Challenges and trends in low-power 3D die-stacked IC designs using RAM, memristor logic, and resistive memory (ReRAM)

Proceedings of International Conference on ASIC

Volumn , Issue , 2011, Pages 299-302

  Chang, Meng Fan ^a   Chiu, Pi Feng ^b   Wu, Wei Cheng ^a   Chuang, Ching Hao ^a   Sheu, Shyh Shyuan ^b  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^b INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN CHALLENGES; IC DESIGNS; LOW POWER; LOW SUPPLY VOLTAGES; LOW-VOLTAGE; MEMORY LAYERS; MEMRISTOR; MOBILE SYSTEMS; POWER-DOWN MODE; RESISTIVE MEMORIES; RESISTIVE RAMS; STACKED LAYER; STATE-RETENTION;

DESIGN; FLASH MEMORY; MEMRISTORS; PASSIVE FILTERS; RESISTORS; THREE DIMENSIONAL;

STATIC RANDOM ACCESS STORAGE;

EID: 84860875993     PISSN: 21627541     EISSN: 2162755X     Source Type: Conference Proceeding    
DOI: 10.1109/ASICON.2011.6157181     Document Type: Conference Paper

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