Electrical compact modelling of graphene transistors

Solid-State Electronics

Volumn 73, Issue , 2012, Pages 27-31

  Frégonèse, Sébastien ^a   Meng, Nan ^b   Nguyen, Huu Nha ^a   Majek, Cedric ^a   Maneux, Cristell ^a   Happy, Henri ^b   Zimmer, Thomas ^a  

^a UNIVERSITÉ DE BORDEAUX   (France)

^b INSTITUT D ELECTRONIQUE   (France)

Author keywords

Circuit; Compact; Electrical; Graphene; LNA; Model; Noise; SPICE; Transistor

Indexed keywords

AC MEASUREMENTS; CIRCUIT DESIGNS; COMPACT; COMPACT MODEL; COMPACT MODELLING; ELECTRICAL; FIGURES OF MERITS; GRAPHENE TRANSISTORS; INPUT AND OUTPUTS; LNA; NOISE; POWER GAINS; REVERSE ISOLATION; STABILITY FACTOR; TRANSIT FREQUENCY; VOLTAGE GAIN;

GRAPHENE; MODELS; NETWORKS (CIRCUITS); SPICE; TRANSISTORS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 84859641057     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2012.02.002     Document Type: Article

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