Ultra-low-power signaling challenges for subthreshold global interconnects

Integration, the VLSI Journal

Volumn 45, Issue 2, 2012, Pages 186-196

  Pable, S D ^a   Hasan, Mohd ^a  

^a ALIGARH MUSLIM UNIVERSITY   (India)

Author keywords

Crosstalk effect; Subthreshold interconnect; Ultra low power; Variability

Indexed keywords

CROSSTALK EFFECT; DESIGN CHALLENGES; DESIGN ISSUES; GLOBAL INTERCONNECTS; INTEGRATION DENSITY; INTERCONNECT CAPACITANCE; INTERCONNECT OPTIMIZATION; PATH DELAY; PORTABLE APPLICATIONS; POWER EFFICIENT; SUBTHRESHOLD; SUBTHRESHOLD INTERCONNECT; SUBTHRESHOLD OPERATION; TECHNOLOGY NODES; ULTRA LOW POWER; VARIABILITY;

CROSSTALK; INTERCONNECTION NETWORKS;

DESIGN;

EID: 84856723589     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2011.09.001     Document Type: Article

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