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Volumn , Issue , 2008, Pages 206-211

Managing losses in through silicon vias with different return current path configurations

Author keywords

[No Author keywords available]

Indexed keywords

CELLULAR RADIO SYSTEMS;

EID: 63049119699     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2008.4763435     Document Type: Conference Paper
Times cited : (10)

References (8)
  • 1
    • 27944462287 scopus 로고    scopus 로고
    • F. Murray, Silicon Based System-in-package: A Passive Integration Technology Combined with Advanced Packaging and System Based Design Tools to Allow a Breakthrough in Miniaturization, 2008 IEEE Bipolar / BiCMOS Circuits and Technology Meeting 2005.
    • F. Murray, "Silicon Based System-in-package: A Passive Integration Technology Combined with Advanced Packaging and System Based Design Tools to Allow a Breakthrough in Miniaturization", 2008 IEEE Bipolar / BiCMOS Circuits and Technology Meeting 2005.
  • 2
    • 25844453501 scopus 로고    scopus 로고
    • J. U. Knickerbocker, Development of Next-generation System-on-package (SOP) Technology Based on Silicon Carriers with Fine-pitch Chip Interconnection, IBM Journal of Research and Technology, IBM J. Res. & Dev. 49 No. 4/5 July/September 2005.
    • J. U. Knickerbocker, "Development of Next-generation System-on-package (SOP) Technology Based on Silicon Carriers with Fine-pitch Chip Interconnection", IBM Journal of Research and Technology, IBM J. Res. & Dev. Vol. 49 No. 4/5 July/September 2005.
  • 4
    • 51249113887 scopus 로고    scopus 로고
    • Electrical characterization of through silicon via (TSV) depending on structural and material parameters based on 3D full wave simulation
    • Nov
    • J. S. Pak, C. Ryu, J. Kim, "Electrical characterization of through silicon via (TSV) depending on structural and material parameters based on 3D full wave simulation", International Conference on Electronic Materials and Packaging, 2007. EMAP 2007. Pages 1-6, Nov. 2007.
    • (2007) International Conference on Electronic Materials and Packaging, 2007. EMAP , pp. 1-6
    • Pak, J.S.1    Ryu, C.2    Kim, J.3
  • 5
    • 34548157489 scopus 로고    scopus 로고
    • An Integrated Signal and Power Integrity Analysis for Signal Traces Through the Parallel Planes Using Hybrid Finite-Element and Finite-Difference Time-Domain Techniques
    • Aug
    • W. Guo, G. Shieu, C. Lin R. Wu, "An Integrated Signal and Power Integrity Analysis for Signal Traces Through the Parallel Planes Using Hybrid Finite-Element and Finite-Difference Time-Domain Techniques", IEEE Transactions on Advanced Packaging, Volume 30, Issue 3, Pages 558-564, Aug. 2007.
    • (2007) IEEE Transactions on Advanced Packaging , vol.30 , Issue.3 , pp. 558-564
    • Guo, W.1    Shieu, G.2    Lin, C.3    Wu, R.4
  • 7
    • 50249151500 scopus 로고    scopus 로고
    • th Electronics Packaging Technology Conference, 2006, EPTC '06, 825-830, Dec. 2006.
    • th Electronics Packaging Technology Conference, 2006, EPTC '06, Pg. 825-830, Dec. 2006.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.