Co-design of signal, power, and thermal distribution networks for 3D ICs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2009, Pages 610-615

  Lee, Young Joon ^a   Yoon, Jo Kim ^a   Gang, Huang ^b   Bakir, Muhannad ^a   Joshi, Yogendra ^a   Fedorov, Andrei ^a   Sung, Kyu Lim ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D ICS; CO-DESIGNS; DECOUPLING CAPACITOR; HEAT REMOVAL; IC TECHNOLOGY; LIQUID COOLING; MICROFLUIDIC CHANNEL; OPERATING TEMPERATURE; POWER DELIVERY; POWER DISTRIBUTION NETWORK; POWER-SUPPLY NOISE; ROUTING RESOURCES; THERMAL DISTRIBUTIONS; THERMAL NETWORK; THROUGH SILICON VIAS; VIABLE SOLUTIONS;

DESIGN; DISTRIBUTED PARAMETER NETWORKS; ELECTRIC POWER TRANSMISSION; FLUIDIC DEVICES;

THREE DIMENSIONAL;

EID: 70350047078     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

1. G. G. Shahidi, "Evolution of CMOS technology at 32 nm and beyond," in Proc. IEEE Custom Integrated Circuits Conf., 2007, pp. 413-416.
2. M. Bakir, B. Dang, and J. Meindl, "Revolutionary nanosilicon ancillary technologies for ultimate-performance gigascale systems," in Proc. IEEE Custom Integrated Circuits Conf., 2007, pp. 421-428.
3. D. Sekar, C. King, B. Dang, T. Spencer, H. Thacker, P. Joseph, M. S. Bakir, and J. D. Meindl, "A 3D-IC Technology with Integrated Microchannel Cooling," in Proc. Int. Interconnect Technol. Conf., 2008.
4. M. S. Bakir, C. King, D. Sekar, H. Thacker, B. Dang, G. Huang, A. Naeemi, and J. D. Meindl, "3D heterogeneous integrated systems: liquid cooling, power delivery, and implementation," in Proc. IEEE Custom Integrated Circuits Conf., 2008.
5. B. Dang, M. S. Bakir, and J. D. Meindl, "Integrated thermal-fluidic I/O interconnect for an on-chip microchannel heat sink," IEEE Electron Device Letter, vol. 27(2), pp. 117-119, 2006.
6. J.-M. Koo, S. Im, L. Jiang, and K. E. Goodson, "Integrated microchannel cooling for three-dimensilonal electronic architecture," J. Heat Transfer, vol. 127, pp. 49-58, 2005.
7. S. V. Patankar, Numerical Heat Transfer and Fluid Flow. Washington, DC, Hemisphere Publishing Corp., 1980.
8. G. Huang, M. Bakir, A. Naeemi, H. Chen, and J. Meindl, "Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication," in Proc. IEEE Electrical Performance of Electronic Packaging, 2007, pp. 205-208.
9. C.-W. Ho, A. E. Ruehli, and P. A. Brennan, "The Modified Nodal Approach to Network Analysis," IEEE Transactions on Circuits and Systems, vol. 22, no. 6, pp. 504-509, June 1975.
10. Q. Zhou, K. Sun, K. Mohanram, and D. C. Sorensen, "Large power grid analysis using domain decomposition," in Proc. Design, Automation and Test in Europe, vol. 1, 2006, pp. 1-6.
11. C. Fiduccia and R. Mattheyses, "A Linear Time Heuristic for Improving Network Partitions," in Proc. ACM Design Automation Conf., 1982, pp. 175-181.
12. M. Pathak and S. K. Lim, "Thermal-aware Steiner Routing for 3D Stacked ICs," in Proc. IEEE Int. Conf. on Computer-Aided Design, 2007, pp. 205-211.
13. K. M. et.al., "A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging," in IEEE International Electron Devices Meeting, 2007, pp. 247-250.
14. G.-J. Nam, "ISPD 2006 Placement Contest." [Online]. Available: http://www.sigda.org/ispd2006/contest.html