A cost effective centralized adaptive routing for networks-on-chip

Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011

Volumn , Issue , 2011, Pages 39-46

  Ran, Manevich ^a   Cidon, Israel ^b   Kolodny, Avinoam ^b   Walter, Isask̀dhar ^a   Wimer, Shmuel ^b  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^b BAR ILAN UNIVERSITY   (Israel)

Author keywords

Adaptive routing; Networks on Chip

Indexed keywords

ADAPTIVE ROUTING; ADAPTIVE ROUTING MECHANISM; AVERAGE PACKET DELAYS; COST EFFECTIVE; GLOBAL VIEW; HARDWARE COST; MESH TOPOLOGIES; NETWORK ON CHIP; NETWORK STATE; NETWORKS ON CHIPS; OBLIVIOUS ROUTING; OFF-CHIP; ON CHIPS; SOURCE-DESTINATION PAIRS; SPECIFIC DESIGN; TIME DEPENDENT; TRAFFIC LOADS;

DESIGN; MICROPROCESSOR CHIPS; PARALLEL ARCHITECTURES; ROUTING PROTOCOLS; SYSTEMS ANALYSIS; VLSI CIRCUITS;

NETWORK ARCHITECTURE;

EID: 80054994284     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2011.10     Document Type: Conference Paper

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