Compact modeling and analysis of through-Si-Via-induced electrical noise coupling in three-dimensional ICs

IEEE Transactions on Electron Devices

Volumn 58, Issue 11, 2011, Pages 4024-4034

  Xu, Chuan ^a   Suaya, Roberto ^b   Banerjee, Kaustav ^a  

^a University of California   (United States)

^b MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

3 D integrated circuit (IC); Active region; coupling coefficient; noise; through silicon via (TSV)

Indexed keywords

3-D INTEGRATED CIRCUIT (IC); ACTIVE REGIONS; COUPLING COEFFICIENT; NOISE; THROUGH-SILICON VIA (TSV);

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTRONICS PACKAGING; EXTRATERRESTRIAL ATMOSPHERES; INTEGRATED CIRCUITS; MODELS; SILICON ON INSULATOR TECHNOLOGY; WHITE NOISE;

THREE DIMENSIONAL;

EID: 80054902621     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2011.2166156     Document Type: Article

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