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Volumn 71, Issue 12, 2011, Pages 1545-1557

A leakage-aware L2 cache management technique for producerconsumer sharing in low-power chip multiprocessors

Author keywords

Chip multiprocessors; L2 cache; Leakage; Producerconsumer sharing

Indexed keywords

CACHE BLOCKS; CHIP MULTIPROCESSOR; L2 CACHE; LEAKAGE POWER MANAGEMENT; LOW POWER; MANAGEMENT TECHNIQUES; OFF-CHIP MEMORIES; ON-CHIP L2 CACHE; PERFORMANCE LOSS; PRODUCERCONSUMER SHARING; RUNTIMES; SHARED BUFFER; SHARED BUS; SPATIAL LOCALITY; TARGET APPLICATION;

EID: 80054679382     PISSN: 07437315     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.jpdc.2011.08.006     Document Type: Article
Times cited : (4)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.