Virtual exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems

Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS

Volumn 1, Issue , 2007, Pages

  Ghosh, Mrinmoy ^a   Lee, Hsien Hsin S ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL APPROACH; CACHE COHERENCE PROTOCOLS; CACHE LINES; DROWSY CACHE; EFFICIENT IMPLEMENTATION; HARDWARE OVERHEADS; INTERNATIONAL CONFERENCES; L2 CACHE; LEAKAGE ENERGIES; LOW COSTS; MULTI CORES; MULTI PROCESSORS; MULTI-LEVEL; MULTI-PROCESSOR SYSTEMS; PARALLEL AND DISTRIBUTED SYSTEMS; STATE INFORMATION;

CACHE MEMORY; COHERENT LIGHT; MULTIPROCESSING SYSTEMS; SHAPE MEMORY EFFECT;

ENERGY CONSERVATION;

EID: 48049117328     PISSN: 15219097     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPADS.2007.4447739     Document Type: Conference Paper

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