Technology assessment of through-silicon via by using C-V and C-t measurements

IEEE Electron Device Letters

Volumn 32, Issue 7, 2011, Pages 946-948

  Katti, Guruprasad ^a,b   Stucchi, Michele ^a   Velenis, Dimitrios ^a   Thangaraju, Sarasvathi ^a   De Meyer, Kristin ^a,b   Dehaene, Wim ^a,b   Beyne, Eric ^a  

^a IMEC   (Belgium)

^b Katholieke Universiteit Leuven   (Belgium)

Author keywords

3 D ICs; C V and C t measurements; through silicon via (TSV); TSV reproducibility

Indexed keywords

3-D ICS; C-V AND C-T MEASUREMENTS; C-V CHARACTERISTIC; OPERATING VOLTAGE; OXIDE LINERS; PROCESSING LINES; REPRODUCIBILITIES; TECHNOLOGY ASSESSMENTS; THROUGH SILICON VIAS; THROUGH-SILICON VIA (TSV);

INTEGRATED CIRCUITS; THERMAL CYCLING;

ELECTRONICS PACKAGING;

EID: 79959810027     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2011.2141650     Document Type: Article

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