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Volumn 50, Issue 4 PART 2, 2011, Pages

Electrical characterization of wafer-bonded germanium-on-insulator substrates using a four-point-probe pseudo-metal-oxide-semiconductor field-effect transistor

(8) Iwasaki, Yuji a Nakamura, Yoshiaki a Kikkawa, Jun a Sato, Motoki b Toyoda, Eiji b Isogai, Hiromichi b Izunome, Koji b Sakai, Akira a

a OSAKA UNIVERSITY (Japan)

b Covalent Silicon Corporation (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING TEMPERATURES; CHANNEL DEPLETION; DEFECT STATE; ELECTRICAL CHARACTERISTIC; ELECTRICAL CHARACTERIZATION; ENERGY-BAND BENDING; FOUR POINT PROBE; GATE VOLTAGES; GERMANIUM-ON-INSULATOR; GOI SUBSTRATES; IN-VACUUM; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; N-CHANNEL; NON-DOPED; SWEEP DIRECTIONS; TRANSISTOR OPERATION;

ANNEALING; CARRIER MOBILITY; DIELECTRIC DEVICES; FIELD EFFECT TRANSISTORS; GERMANIUM; METAL ANALYSIS; MOSFET DEVICES; PROBES; SILICON WAFERS;

WAFER BONDING;

EID: 79955456515 PISSN: 00214922 EISSN: 13474065 Source Type: Journal
DOI: 10.1143/JJAP.50.04DA14 Document Type: Article

Times cited : (13)

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