Forming gas annealing characteristics of germanium-on-insulator substrates

IEEE Electron Device Letters

Volumn 29, Issue 7, 2008, Pages 674-676

  Jin, hai Yan ^a   Cheung, Nathan W ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Characterization; Forming gas annealing; Germanium on insulator (GeOI); Hysteresis; Mobility; Pseudo MOSFET

Indexed keywords

ANNEALING; CHARGE CARRIERS; CHARGE DENSITY; CHEMICAL VAPOR DEPOSITION; CIVIL AVIATION; GERMANIUM; MOSFET DEVICES; OPTICAL DESIGN; PHASE INTERFACES; SUBSTRATES;

ANNEALING CONDITIONS; BULK CARRIERS; CARRIER (CO); FIXED CHARGE DENSITY; FORMING GAS; FORMING GAS ANNEALING (FGA); GEOI SUBSTRATES; GERMANIUM ON INSULATOR (GEOI); HIGH-TEMPERATURE ANNEALING; INTERFACE TRAP DENSITY (NIT); ION-CUT; LARGE AREAS; LAYER-TRANSFER (LT); PSEUDO-MOSFET;

CARRIER MOBILITY;

EID: 47249104335     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.2000602     Document Type: Article

References (20)

1. H. Shang, K. L. Lee, P. Kozlowski, C. D'Emic, I. Babich, E. Sikoski, M. Ieong, H.-S. P. Wong, K. Guarini, and W. Haensch, "Self-aligned n-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric and tungsten gate," IEEE Electron Device Lett., vol. 25, no. 3, pp. 135-137, Mar. 2004.
2. D. Chi, C. O. Chui, K. C. Saraswat, B. B. Triplett, and P. C. Mclntyre, "Zirconia grown by ultraviolet ozone oxidation on germanium (100) substrates," J. Appl. Phys., vol. 96, no. 1, pp. 813-819, Jul. 2004.
3. 2 high-k dielectrics grown by room temperature ultraviolet ozone oxidation," Appl. Phys. Lett., vol. 84, no. 3, pp. 389-391, Jan. 2004.
4. A. Nayfeh, C. O. Chui, T. Yonehara, and K. C. Saraswat, "Fabrication of high-quality p-MOSFFT in Ge grown heteroepitaxially on Si," IEEE Electron Device Lett., vol. 26, no. 5, pp. 311-313, May 2005.
5. C. O. Chui and K. C. Saraswat, "Advanced germanium MOSFET technologies with high-k gate dielectrics and shallow junctions," in Proc. IEEE ICICDT Tech. Dig., 2004, pp. 245-252.
6. C. J. Tracy, P. Fejes, N. D. Theodore, P. Maniar, E. Johnson, A. J. Lamm, A. M. Paler, I. J. Malik, and P. Ong, "Germanium-on-insulator substrates by wafer bonding," J. Electron. Mater., vol. 33, no. 8, pp. 886-892, Aug. 2004.
7. S. Nakaharai, T. Tezuka, N. Sugiyama, Y. Moriyama, and S. Takagi, "Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-oondensation technique," Appl. Phys. Lett., vol. 83, no. 17, pp. 3516-3518, Oct. 2003.
8. Y. Liu, M. D. Deal, and J. D. Plummer, "High-quality single-crystal Ge on insulator by liquid-phase epitaxy on Si substrates," Appl. Phys. Lett., vol. 84, no. 14, pp. 2563-2565, Apr. 2004.
9. E. J. Preisler, S. Guha, B. R. Perkins, D. Kazazis, and A. Zaslavsky, "Ultrathin epitaxial germanium on crystalline oxide metal-oxide-semiconductor-field-effect transistors," Appl. Phys. Lett., vol. 86, no. 22, p. 223-504, May 2005.
10. F. Letertre, C. Deguet, C. Richtarch, B. Faure, J. M. Hartmann, F. Chieu, A. Beaumont, J. Dechamp, C. Morales, F. Allibert, P. Perreau, S. Pocas, S. Personnic, C. Lagahe-Blanchard, B. Ghyselen, Y. M. Le Vaillant, E. Jalaguier, N. Kernevez, and C. Mazure, "Germanium-on-insulator (GeOI) structure realized by the Smart Cut technology," in Pyoc. Mater. Res. Soc. Symp., 2004, vol. 809 pp. B4.4.1-B4.4.6.
11. T. Akatsu, C. Deguet, L. Sanchez, F. Allibert, D. Rouchon, T. Signamarcheix, C. Richtarch, A. Boussagol, V. Loup, F. Mazen, J.-M. Hartmann, Y. Campidelli, L. Clavelier, F. Letertre, N. Kernevez, and C. Mazure, "Germanium-on-insular (GeOI) substrates - A novel engineered substrate for future high performance devices," Mater. Sci. Semicond. Process., vol. 9, no. 4/5, pp. 444-448, Aug.-Oct. 2006.
12. C. Deguet, L. Sanchez, T. Akatsu, F. Allibert, J. Dechamp, F. Madeira, F. Mazen, A. Tauzin, V. Loup, C. Richtarch, D. Mercier, T. Signamarcheix, F. Letertre, B. Depuydt, and N. Kernevez, "Fabrication and characterisation of 200 mm germanium-on-insular (GeOI) substrates made from bulk germanium," Electron. Lett., vol. 42, no. 7, pp. 415-417, Mar. 2006.
13. M. Bruel, "Silicon on insulator material technology," Electron. Lett., vol. 31, no. 14, pp. 1201-1202, Jul. 1995.
14. S. W. Bedell and W. A. Lanford, "Investigation of surface blistering of hydrogen implanted crystals," J. Appl. Phys., vol. 90, no. 3, pp. 1138-1146, Aug. 2001.
15. S. Cristoloveanu, D. Munteanu, and M. Liu, "A review of the pseudo-MOS transistor in SOI wafers: Operation, parameter extraction, and applications," IEEE Trans. Electron Devices, vol. 47, no. 5, pp. 1018-1027, May 2000.
16. A. M. Ionescu and D. Munteanu, "A novel in-situ SOI characterization technique: The intrinsic point-probe MOSFFT" IEEE Electron Device Lett., vol. 22, no. 4, pp. 166-169, Apr. 2001.
17. G. Ghibaudo. "New method for the extraction of MOSFET parameters," Electron. Lett., vol. 24, no. 9, pp. 543-545, Apr. 1988.
18. T. Ouisse, P. Morfouli, O. Faynot. H. Seghir. J. Margail, and S. Cristoloveanu, "A detailed investigation of the pseudo-MOS transistor for in situ characterization of SOI wafers," in Proc. IEEE Int. SOI Conf., 1992, pp. 30-31.
19. H.-Y. Jin and N. W. Cheung, "A new method to extract bulk carrier mobility in germanium-on-insulator," IEEE Trans. Electron Devices vol. 55, no. 5, pp. 1250-1254, May 2008.
20. J. C. C. Tsai, VLSI Technology, S. M. Sze, Ed. New York: McGraw-Hill, 1983, p. 185.