Flexible interconnection network for dynamically and partially reconfigurable architectures

International Journal of Reconfigurable Computing

Volumn 2010, Issue , 2010, Pages

  Devaux, Ludovic ^a   Ben Sassi, Sana ^a   Pillement, Sebastien ^a   Chillet, Daniel ^a   Demigny, Didier ^a  

^a CAMPUS DE BEAULIEU   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION ARCHITECTURES; COMMUNICATION CONSTRAINTS; DYNAMIC AND PARTIAL RECONFIGURATION; DYNAMIC MANAGEMENT; DYNAMIC RE-CONFIGURATION; FPGA IMPLEMENTATIONS; NETWORKS ON CHIPS; PARTIALLY RECONFIGURABLE ARCHITECTURES;

DYNAMIC MODELS; INTERCONNECTION NETWORKS; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 78349270926     PISSN: 16877195     EISSN: 16877209     Source Type: Journal    
DOI: 10.1155/2010/390545     Document Type: Article

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