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Volumn 22, Issue 5, 2005, Pages 443-451
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Dynamic interconnection of reconfigurable modules on reconfigurable devices
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
BUFFER STORAGE;
FIELD PROGRAMMABLE GATE ARRAYS;
INTEGRATED CIRCUIT LAYOUT;
MATHEMATICAL MODELS;
ROUTERS;
DYNAMIC NETWORK ON CHIP;
RECONFIGURABLE COMPUTING;
ROUTING ALGORITHMS;
MICROPROCESSOR CHIPS;
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EID: 27344453831
PISSN: 07407475
EISSN: None
Source Type: Journal
DOI: 10.1109/MDT.2005.109 Document Type: Article |
Times cited : (74)
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References (10)
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