Designing efficient irregular networks for heterogeneous systems-on-chip

Journal of Systems Architecture

Volumn 54, Issue 3-4, 2008, Pages 384-396

  Neeb, Christian ^a   Wehn, Norbert ^a  

^a University of Koblenz Landau   (Germany)

Author keywords

Custom architecture; Deadlock; Network on chip; Routing algorithm; Topology synthesis

Indexed keywords

COMPUTER SYSTEM RECOVERY; NETWORK ARCHITECTURE; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; ROUTING ALGORITHMS; SCALABILITY;

CUSTOM ARCHITECTURE; NETWORK-ON-CHIP; TOPOLOGY SYNTHESIS;

MICROPROCESSOR CHIPS;

EID: 43049142308     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2007.07.006     Document Type: Article

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