|
Volumn 35, Issue 3, 2000, Pages 425-433
|
Bus architecture of a system on a chip with user-configurable system logic
a |
Author keywords
[No Author keywords available]
|
Indexed keywords
CMOS INTEGRATED CIRCUITS;
COMPUTER ARCHITECTURE;
DATA STORAGE EQUIPMENT;
EMBEDDED SYSTEMS;
FIELD PROGRAMMABLE GATE ARRAYS;
LOGIC CIRCUITS;
PIPELINE PROCESSING SYSTEMS;
TABLE LOOKUP;
USER-CONFIGURABLE SYSTEM LOGIC;
MICROPROCESSOR CHIPS;
|
EID: 0033890555
PISSN: 00189200
EISSN: None
Source Type: Journal
DOI: 10.1109/4.826825 Document Type: Article |
Times cited : (20)
|
References (8)
|