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Volumn 2002-January, Issue , 2002, Pages 216-220

On-chip segmented bus: A self-timed approach

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUSES; INTEGRATED CIRCUIT DESIGN; SYSTEM-ON-CHIP;

EID: 0344841127     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.2002.1158059     Document Type: Conference Paper
Times cited : (21)

References (15)
  • 7
    • 0029191713 scopus 로고
    • Asynchronous design methodologies: An overview
    • January
    • S. Hauck. Asynchronous Design Methodologies: An Overview Proceedings of the IEEE, Vol. 83, No. 1, pp.69-93,January 1995.
    • (1995) Proceedings of the IEEE , vol.83 , Issue.1 , pp. 69-93
    • Hauck, S.1
  • 8
    • 0033097697 scopus 로고    scopus 로고
    • An effective synthesis algorithm for partitioned bus architecture
    • 18 March
    • J. Jeon, K. Choi, An Effective Synthesis Algorithm for Partitioned Bus Architecture. Institute of Electrical Engineers, Electronics Letters, Vol. 35, No. 6, 18 March 1999, pp. 440-441.
    • (1999) Institute of Electrical Engineers, Electronics Letters , vol.35 , Issue.6 , pp. 440-441
    • Jeon, J.1    Choi, K.2
  • 10
    • 0347239894 scopus 로고
    • Interconnection topologies for parallel processing systems
    • June
    • G. Kotsis. fnterconnection Topologies for Parallel Processing Systems. PARS Mitteilungen, No. 11, June, 1993, pages 1-6.
    • (1993) PARS Mitteilungen , Issue.11 , pp. 1-6
    • Kotsis, G.1
  • 13
    • 0345633658 scopus 로고    scopus 로고
    • On design of a survivable network architecture for dynamic routing: Optimal solution strategy and an efficient heurisäc
    • I. Ouveysi, A. Wirth. On Design Of A Survivable Network Architecture For Dynamic Routing: Optimal Solution Strategy And An Efficient Heurisäc. European Journal of Operational Research 117 (1999) 30-44.
    • (1999) European Journal of Operational Research , vol.117 , pp. 30-44
    • Ouveysi, I.1    Wirth, A.2
  • 15
    • 84949038002 scopus 로고    scopus 로고
    • Design of an asynchronous vme bus controller for heterogeneous systems
    • A. Zitouni et al. Design of an Asynchronous VME bus Controller for Heterogeneous systems. Dedicated Systems Magazine - 2000 Q3 (http://www.dedicated-systems.com).
    • Dedicated Systems Magazine - 2000 Q3
    • Zitouni, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.