Threshold voltage instability induced by plasma process damage in advanced metal-oxide-semiconductor field-effect transistors

Japanese Journal of Applied Physics

Volumn 49, Issue 8 PART 2, 2010, Pages

  Eriguchi, Koji ^a   Nakakubo, Yoshinori ^a   Matsuda, Asahiko ^a   Kamei, Masayuki ^a   Takao, Yoshinori ^a   Ono, Kouichi ^a  

^a KYOTO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS POWER; CLASSICAL MOLECULAR DYNAMICS; DAMAGE FORMATION; DAMAGED LAYERS; DAMAGED STRUCTURES; DEFECT SITES; DEVICE PARAMETERS; EXPONENTIAL INCREASE; GATE LENGTH; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; MOS-FET; MOSFETS; N-CHANNEL; OFF-STATE LEAKAGE CURRENT; OPTICAL ANALYSIS; PHYSICAL DAMAGES; PLASMA PROCESS; PLASMA-INDUCED; PROCESS PARAMETERS; RECESS DEPTH; STANDBY POWER; TECHNOLOGY COMPUTER AIDED DESIGN; VOLTAGE INSTABILITY;

BIAS VOLTAGE; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; DEFECT DENSITY; DEFECTS; DIELECTRIC DEVICES; ION BOMBARDMENT; MOLECULAR DYNAMICS; MOSFET DEVICES; PLASMA DIAGNOSTICS; PLASMA STABILITY; PLASMAS; THRESHOLD VOLTAGE;

FIELD EFFECT TRANSISTORS;

EID: 77958098374     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.49.08JC02     Document Type: Article

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