GPU-based acceleration of system-level design tasks

International Journal of Parallel Programming

Volumn 38, Issue 3-4, 2010, Pages 225-253

  Bordoloi, Unmesh D ^a   Chakraborty, Samarjit ^b  

^a VERIMAG   (France)

^b TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

Design space exploration; Electronic design automation; GPGPU; Timing analysis

Indexed keywords

COMBINATORIAL OPTIMIZATION PROBLEMS; COMPUTATIONAL KERNELS; CORE PROBLEMS; DESIGN SPACE EXPLORATION; ELECTRONIC DESIGN AUTOMATION; GPGPU; GRAPHICS PROCESSING UNITS; HARDWARE COST; HARDWARE/SOFTWARE DESIGN; KNAPSACK PROBLEMS; NOTE-BOOK COMPUTER; NP-HARD; RUNNING TIME; SCHEDULABILITY ANALYSIS; SOFTWARE PARTITIONING; SYSTEM LEVEL DESIGN; TIMING ANALYSIS;

ARCHITECTURAL DESIGN; AUTOMATION; BIOINFORMATICS; COMBINATORIAL OPTIMIZATION; COMPUTER AIDED DESIGN; COMPUTER GRAPHICS EQUIPMENT; EMBEDDED SYSTEMS; INTEGER PROGRAMMING; LAPTOP COMPUTERS; SPACE RESEARCH; TIME MEASUREMENT;

PROGRAM PROCESSORS;

EID: 77955926619     PISSN: 08857458     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10766-009-0125-6     Document Type: Conference Paper

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