TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 243-246

  Ekman, Magnus ^a   Dahlgren, Fredrik ^b   Stenström, Per ^a  

^a CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

^b ERICSSON RESEARCH   (Sweden)

Author keywords

CMP; Low power; Snoop; Virtual caches

Indexed keywords

BUFFER CIRCUITS; CACHE MEMORY; COMPUTER SIMULATION; NETWORK PROTOCOLS; POWER CONTROL;

CHIP MULTIPROCESSORS; PAGE SHARING TABLE; PAGE SIZE INFORMATION SCHEME; SNOOP ACCESS; SOFTWARE PACKAGE SIMICS; TRANSLATION LOOK-AHEAD BUFFER; VIRTUAL CACHES;

MICROPROCESSOR CHIPS;

EID: 0036954448     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/lpe.2002.146746     Document Type: Conference Paper

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