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Volumn 2003-January, Issue , 2003, Pages 312-317

A selective filter-bank TLB system [embedded processor MMU for low power]

Author keywords

Analytical models; Associative memory; Computational modeling; Degradation; Embedded computing; Energy consumption; Filter bank; Filtering; Hardware; Large scale integration

Indexed keywords

ANALYTICAL MODELS; ASSOCIATIVE PROCESSING; COMPUTER HARDWARE; DEGRADATION; ENERGY CONSERVATION; ENERGY UTILIZATION; FILTER BANKS; FILTRATION; LOW POWER ELECTRONICS; LSI CIRCUITS; PHYSICAL ADDRESSES; POWER ELECTRONICS;

EID: 1542359134     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPE.2003.1231885     Document Type: Conference Paper
Times cited : (18)

References (12)
  • 4
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    • Low power TLB Design for High Performance Microprocessors
    • S. Manne, et al., Low power TLB Design for High Performance Microprocessors. Univ. of Colorado Technical Report, 1997.
    • (1997) Univ. of Colorado Technical Report
    • Manne, S.1
  • 5
    • 0032119566 scopus 로고    scopus 로고
    • Virtual Memory in Contemporary microprocessors
    • July/August
    • B. L. Jacob, et al., Virtual Memory in Contemporary microprocessors. IEEE Micro, Vol. 18, No. 4, July/August 1998, pp. 60-75.
    • (1998) IEEE Micro , vol.18 , Issue.4 , pp. 60-75
    • Jacob, B.L.1
  • 6
    • 0032095071 scopus 로고    scopus 로고
    • Virtual Memory: Issues of Implementation
    • June
    • B. L. Jacob, et al., Virtual Memory: Issues of Implementation, IEEE Computer, Vol. 31, No. 6, (June 1998), 33-43.
    • (1998) IEEE Computer , vol.31 , Issue.6 , pp. 33-43
    • Jacob, B.L.1
  • 8
    • 0029288557 scopus 로고
    • Trends in Low-Power RAM Circuit Technologies
    • April
    • K. Itoh, et al., Trends in Low-Power RAM Circuit Technologies in the Proceedings of the IEEE, vol. 83, no. 4, (April 1995), 524-543.
    • (1995) The Proceedings of the IEEE , vol.83 , Issue.4 , pp. 524-543
    • Itoh, K.1
  • 9
    • 0027256982 scopus 로고
    • Trading Speed for Low Power by Choice of Supply and Threshold Voltages
    • D. Liu, et al., Trading Speed for Low Power by Choice of Supply and Threshold Voltages. IEEE Journal of Solid State Circuits, Vol. 28, No. 1, 1993.
    • (1993) IEEE Journal of Solid State Circuits , vol.28 , Issue.1
    • Liu, D.1
  • 10
    • 1542296904 scopus 로고    scopus 로고
    • CACTI 3.0: An Integrated Cache Timing and Power, and Area Model
    • August
    • G. Reinman, et al., CACTI 3.0: An Integrated Cache Timing and Power, and Area Model. Compaq WRL Report, August 2001.
    • (2001) Compaq WRL Report
    • Reinman, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.