Optimizing instruction TLB energy using software and hardware techniques

ACM Transactions on Design Automation of Electronic Systems

Volumn 10, Issue 2, 2005, Pages 229-257

  Kadayif, I ^a   Sivasubramaniam, A ^b,c   Kandemir, M ^b,c   Kandiraju, G ^b,c   Chen, G ^b,b,c,c  

^a ÇANAKKALE ONSEKIZ MART UNIVERSITY   (Turkey)

^b PENNSYLVANIA STATE UNIVERSITY   (United States)

^c The Pennsylvania State University   (United States)

Author keywords

Cache design; Compiler optimization; Instruction locality; Power consumption; Translation look aside buffer

Indexed keywords

EID: 30544433247     PISSN: 10844309     EISSN: 10844309     Source Type: Journal    
DOI: 10.1145/1059876.1059879     Document Type: Review

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