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Volumn , Issue , 2010, Pages 2107-2112

Developing a dual-stage indirect virtual metrology architecture

Author keywords

Dual stage indirect VM architecture (DIVMA); Indirect VM problem; Virtual cassette; Virtual metrology (VM)

Indexed keywords

COUPLING EFFECT; DUAL STAGE; DUAL-STAGE INDIRECT VM ARCHITECTURE (DIVMA); INDIRECT VM PROBLEM; MANUFACTURING PROCESS; PROCESS TOOLS; PROCESSING QUALITY; SINGLE STAGE; TFT-LCDS; VIRTUAL CASSETTE; VIRTUAL METROLOGY;

EID: 77955834441     PISSN: 10504729     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ROBOT.2010.5509719     Document Type: Conference Paper
Times cited : (4)

References (14)
  • 1
    • 38949115522 scopus 로고    scopus 로고
    • Virtual Metrology and Your Technology Watch List: Ten Things You Should Know about This Emerging Technology
    • section 4, Jan.
    • A. Weber, "Virtual Metrology and Your Technology Watch List: Ten Things You Should Know about This Emerging Technology," Future Fab International, issue 22, section 4, pp. 52-54, Jan. 2007.
    • (2007) Future Fab International , Issue.22 , pp. 52-54
    • Weber, A.1
  • 2
    • 77955791776 scopus 로고    scopus 로고
    • Method and System for Virtual Metrology in Semiconductor Manufacturing
    • United States Patent, Pub No.: US 7,359,759, Apr.
    • Y.-C. Chang, H.-S. Fu, Y.-L. Wang, and F.-T. Cheng, "Method and System for Virtual Metrology in Semiconductor Manufacturing," United States Patent, Pub No.: US 7,359,759, Apr. 2008.
    • (2008)
    • Chang, Y.-C.1    Fu, H.-S.2    Wang, Y.-L.3    Cheng, F.-T.4
  • 5
    • 33646725309 scopus 로고    scopus 로고
    • A Processing Quality Prognostics Scheme for Plasma Sputtering in TFT-LCD Manufacturing
    • May
    • Y.-C. Su, M.-H. Hung, F.-T. Cheng, and Y.-T. Chen, "A Processing Quality Prognostics Scheme for Plasma Sputtering in TFT-LCD Manufacturing," IEEE Transactions on Semiconductor Manufacturing, vol. 19, no. 2, pp. 183-194, May 2006.
    • (2006) IEEE Transactions on Semiconductor Manufacturing , vol.19 , Issue.2 , pp. 183-194
    • Su, Y.-C.1    Hung, M.-H.2    Cheng, F.-T.3    Chen, Y.-T.4
  • 8
    • 34347398446 scopus 로고    scopus 로고
    • A Novel Virtual Metrology Scheme for Predicting CVD Thickness in Semiconductor Manufacturing
    • June
    • M.-H. Hung, T.-H. Lin, F.-T. Cheng, and R.-C. Lin, "A Novel Virtual Metrology Scheme for Predicting CVD Thickness in Semiconductor Manufacturing," IEEE/ASME Transactions on Mechatronics, vol. 12, no. 3, pp. 308-316, June 2007.
    • (2007) IEEE/ASME Transactions on Mechatronics , vol.12 , Issue.3 , pp. 308-316
    • Hung, M.-H.1    Lin, T.-H.2    Cheng, F.-T.3    Lin, R.-C.4
  • 10
    • 56349142439 scopus 로고    scopus 로고
    • Virtual Metrology and Feedback Control for Semiconductor Manufacturing Process Using Recursive Partial Least Squares
    • Apr.
    • A. A. Khan, J. R. Moyne, and D. M. Tilbury, "Virtual Metrology and Feedback Control for Semiconductor Manufacturing Process Using Recursive Partial Least Squares," Journal of Process Control, vol. 18, pp. 961-974, Apr. 2008.
    • (2008) Journal of Process Control , vol.18 , pp. 961-974
    • Khan, A.A.1    Moyne, J.R.2    Tilbury, D.M.3
  • 14
    • 49249085507 scopus 로고    scopus 로고
    • Accuracy and Real-Time Considerations for Implementing Various Virtual Metrology Algorithms
    • August
    • Y.-C. Su, T.-H. Lin, F.-T. Cheng, and W.-M. Wu, "Accuracy and Real-Time Considerations for Implementing Various Virtual Metrology Algorithms," IEEE Transactions on Semiconductor Manufacturing, vol. 21, no. 3, pp. 426-434, August 2008.
    • (2008) IEEE Transactions on Semiconductor Manufacturing , vol.21 , Issue.3 , pp. 426-434
    • Su, Y.-C.1    Lin, T.-H.2    Cheng, F.-T.3    Wu, W.-M.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.