Thermal-aware voltage droop compensation for multi-core architectures

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2010, Pages 335-340

  Zhao, Jia ^a   Datta, Basab ^a   Burleson, Wayne ^a   Tessier, Russell ^a  

^a University of Massachusetts   (United States)

Author keywords

monitor network on chip; thermal monitor; voltage emergency

Indexed keywords

CLOCK FREQUENCY; FREQUENCY-SCALING; HIGH TEMPERATURE; HIGHER TEMPERATURES; MULTICORE ARCHITECTURES; MULTICORE ENVIRONMENTS; NETWORK ON CHIP; ON CHIP INTERCONNECT; PERFORMANCE STATISTICS; RUNTIMES; VOLTAGE DROOP; VOLTAGE EMERGENCIES;

FREQUENCY MODULATION; INTERCONNECTION NETWORKS; LAKES; MICROPROCESSOR CHIPS; NANOTECHNOLOGY; VLSI CIRCUITS;

MONITORING;

EID: 77954510740     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1785481.1785558     Document Type: Conference Paper

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