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Volumn , Issue , 2004, Pages 326-331

Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization

Author keywords

DI dt; Hardware software co design; Power aware computing; Voltage emergencies

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; FEEDBACK CONTROL; OPTIMIZATION; PRODUCT DESIGN; PROGRAM PROCESSORS;

EID: 16244412618     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1013235.1013315     Document Type: Conference Paper
Times cited : (15)

References (12)
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  • 3
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    • Wattch: A framework for architectural-level power analysis and optimizations
    • D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A framework for architectural-level power analysis and optimizations. In ISCA-27, 2000.
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    • Brooks, D.1    Tiwari, V.2    Martonosi, M.3
  • 6
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    • Microarchitectural simulation and control of di/dt-induced power supply voltage variation
    • E. Grochowski, D. Ayers, and V. Tiwari. Microarchitectural simulation and control of di/dt-induced power supply voltage variation. In HPCA-8, pages 7-16, 2002.
    • (2002) HPCA-8 , pp. 7-16
    • Grochowski, E.1    Ayers, D.2    Tiwari, V.3
  • 7
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    • Control techniques to eliminate voltage emergencies in high performance processors
    • R. Joseph, D. Brooks, and M. Martonosi. Control techniques to eliminate voltage emergencies in high performance processors. In HPCA-9, 2003.
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    • Joseph, R.1    Brooks, D.2    Martonosi, M.3
  • 8
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    • Wavelet analysis for microprocessor design: Experiences with wavelet based di/dt characterization
    • R. Joseph, Z. Hu, and M. Martonosi. Wavelet analysis for microprocessor design: Experiences with wavelet based di/dt characterization. In HPCA-10, 2004.
    • (2004) HPCA-10
    • Joseph, R.1    Hu, Z.2    Martonosi, M.3
  • 9
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    • Pipeline damping: A microarchitectural technique to reduce inductive noise in supply voltage
    • M. D. Powell and T. N. Vijaykumar. Pipeline damping: A microarchitectural technique to reduce inductive noise in supply voltage. In ISCA-30, pages 72-83, 2003.
    • (2003) ISCA-30 , pp. 72-83
    • Powell, M.D.1    Vijaykumar, T.N.2
  • 10
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    • Power distribution system design methodology and capacitor selection for modern CMOS technology
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.