High-quality pattern selection for screening small-delay defects considering process variations and crosstalk

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2010, Pages 1426-1431

  Peng, Ke ^a   Yilmaz, Mahmut ^b   Tehranipoor, Mohammad ^a   Chakrabarty, Krishnendu ^c  

^a UNIVERSITY OF CONNECTICUT   (United States)

^b ADVANCED MICRO DEVICES   (United States)

^c DUKE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATPG TOOLS; DELAY DEFECTS; HIGH QUALITY; HIGH-PERFORMANCE INTEGRATED CIRCUITS; LATEST TECHNOLOGY; LONG-PATH; PATH LENGTH; PATTERN EVALUATION; PHYSICAL DEFECTS; POWER-SUPPLY NOISE; PROCESS VARIATION; RESISTIVE OPEN; SELECTION PROCEDURES; STATIC TIMING ANALYSIS; TEST SETS;

CROSSTALK; DEFECTS; DELAY CIRCUITS; ELECTRON DEVICE TESTING; TIME MEASUREMENT;

TIMING CIRCUITS;

EID: 77953087058     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)

1. R. Mattiuzzo, D. Appello C. Allsup, "Small Delay Defect Testing," http://www.tmworld.com/article/CA6660051.html Test & Measurement World, 2009.
2. S. Goel, N. Devta-Prasanna and R. Turakhia, "Effective and Efficient Test pattern Generation for Small Delay Defects," in Proc. IEEE VLSI Test Symposium (VTS'09), 2009.
3. N. Ahmed, M. Tehranipoor and V. Jayaram, "Timing-Based Delay Test for Screening Small Delay Defects," in Proc. IEEE Design Automation Conf., pp. 320-325, 2006.
4. M. E. Amyeen, S. Venkataraman, A. Ojha, S. Lee, "Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor", in Proc. IEEE International Test Conference (ITC'04), pp. 669-678, 2004.
5. Synopsys Inc., "SOLD Y-2007, Volumes 1, 2, 3," Synopsys Inc.,Oct., 2007.
6. Mentor Graphics, "Understanding how to run timing-aware ATPG," Application Note,2006.
7. M. Yilmaz, K. Chakrabarty, and M. Tehranipoor, "Test-Pattern Grading and Pattern Selection for Small-Delay Defects," in Proc. IEEE VLSI Test Symposium (VTS'08), 2008.
8. M. Yilmaz, K. Chakrabarty, and M. Tehranipoor, "Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects," in Proc. IEEE Int. Test Conference (ITC'08), 2008.
9. A. B. Kahng, B. Liu, and X. Xu, "Statistical Timing Analysis in the Presence of Signal-Integrity Effects," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 10, October 2007.
10. R.-B. Lin, and M.-C. Wu, "A New Statistical Approach to Timing Analysis of VLSI Circuits," in IEEE DAC2001, 1997.
11. P. Gupta, and M. S. Hsiao, "ALAPTF: A new transition fault model and the ATPG algorithm," in Proc. Int. Test Conf. (ITC'04), pp. 1053-1060, 2004.
12. A. K. Majhi, V. D. Agrawal, J. Jacob, L. M. Patnaik, "Line Coverage of Path Delay Faults," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, Vol. 8, No. 5, pp. 610-614, 2000.
13. R. Tayade, J. A. Abraham, "Critical Path Selection For Delay Test Considering Coupling Noise," in Proc. IEEE European Test Symposium., pp. 119-124, 2008.
14. J. Lion, A. Krstic, L.-C. Wang, and K.-T. Cheng, "False-Path-Aware Statistical Timing Analysis and Efficient Path Selection for Delay Testing and Timing Validation," in Proc. Design Automation Conference (DAC'02), pp. 566-569, 2002.
15. Z. Wang, D. M. H. Walker, "Dynamic Compaction for High Quality Delay Test," in Proc. 26th IEEE VLSI Test Symposium (VTS'08), 2008.
16. E. S. Park, M. R. Mercer, T. W. Williams, "Statistical Delay Fault Coverage and Defect Level for Delay Faults," in Proc. IEEE International Test Conference (ITC'88), 1988.
17. J. M. Rabaey, A. Chandrakasan, B. Nikolic, "Digital Integrated Circuits, A Design Perspective (Second Edition)," Prentice Hall Publishers, 2003.
18. L. B. Koralov, Y. G. Sinai, "Theory of Probability and Random Processes," Second Edition, springer.com. ISBN: 978-3-540-25484-3.
19. ITRS 2008, "http://www.itrs.net/Links/2008ITRS/Home2008.htm."
20. W. Chen, S. Gupta, and M. Breuer, "Analytic Models for Crosstalk Delay and Pulse Analysis Undernon-Ideal Inputs," in Proc. IEEE International Test Conference (ITC'97), pp. 808-818, 1997.
21. G. W. Recktenwald, "Numerical Methods with MATLAB: Implementations and Applications," Prentice-Hall, 2000.