메뉴 건너뛰기




Volumn 7, Issue 2, 2010, Pages 217-223

On the thermal attack in instruction caches

Author keywords

Cache memories; Fine grain localized hotspot; Malicious codes; Microprocessors; Thermal attack

Indexed keywords

EMPIRICAL DESIGN; HEAT-UP; HOT SPOT; HOTSPOTS; INSTRUCTION CACHES; MALICIOUS CODES; MICROPROCESSORS; ON CHIPS; PHYSICAL DAMAGES; THERMAL ATTACK; THERMAL MANAGEMENT; THERMAL SENSORS;

EID: 77952697108     PISSN: 15455971     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDSC.2009.16     Document Type: Article
Times cited : (23)

References (36)
  • 1
    • 0032592096 scopus 로고    scopus 로고
    • Design challenges of technology scaling
    • July/Aug
    • S. Borkar," Design Challenges of Technology Scaling," IEEE Micro, vol. 19, no. 4, pp. 23-29, July/Aug. 1999.
    • (1999) IEEE Micro , vol.19 , Issue.4 , pp. 23-29
    • Borkar, S.1
  • 4
    • 1542296867 scopus 로고    scopus 로고
    • Memory hierarchy extensions to simplescalar 3.0
    • Dept. Of Computer Sciences, Univ. of Texas at Austin
    • D. Burger, A. Kagi, and M. S. Hrishikesh, "Memory Hierarchy Extensions to Simplescalar 3.0," Technical Report TR99-25, Dept. of Computer Sciences, Univ. of Texas at Austin, 2000.
    • (2000) Technical Report TR99-25
    • Burger, D.1    Kagi, A.2    Hrishikesh, M.S.3
  • 10
    • 0003815341 scopus 로고    scopus 로고
    • Managing the impact of increasing microprocessor power consumption
    • Feb
    • S. H. Gunther, F. Binns, D. M. Carmean, and J. C. Hall, "Managing the Impact of Increasing Microprocessor Power Consumption," Intel Technology J., vol. 5, no. 1, p. 9, Feb. 2001.
    • (2001) Intel Technology J. , vol.5 , Issue.1 , pp. 9
    • Gunther, S.H.1    Binns, F.2    Carmean, D.M.3    Hall, J.C.4
  • 13
    • 49149120280 scopus 로고    scopus 로고
    • Accurate pre-RTL temperature-aware design using a parameterized, geometric thermal model
    • Sept
    • W. Huang, K. Sankaranarayanan, K. Skadron, R. J. Ribando, and M. R. Stan, "Accurate Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model," IEEE Trans. Computers, vol. 57, no. 9, pp. 1277-1288, Sept. 2008.
    • (2008) IEEE Trans. Computers , vol.57 , Issue.9 , pp. 1277-1288
    • Huang, W.1    Sankaranarayanan, K.2    Skadron, K.3    Ribando, R.J.4    Stan, M.R.5
  • 14
    • 84944414165 scopus 로고    scopus 로고
    • Runtime power monitoring in high-end processors: Methodology and empirical data
    • Dec
    • C. Isci and M. Martonosi, "Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data," Proc. IEEE/ACM Int'l Symp. Microarchitecture, Dec. 2003.
    • (2003) Proc. IEEE/ACM Int'l Symp. Microarchitecture
    • Isci, C.1    Martonosi, M.2
  • 22
    • 34547176379 scopus 로고    scopus 로고
    • Systematic temperature sensor allocation and placement for microprocessors
    • July
    • R. Mukherjee and S. O. Memik, "Systematic Temperature Sensor Allocation and Placement for Microprocessors," Proc. Design Automation Conf., July 2006.
    • (2006) Proc. Design Automation Conf.
    • Mukherjee, R.1    Memik, S.O.2
  • 28
    • 34547646687 scopus 로고    scopus 로고
    • Evaluate the performance changes of processor simulator benchmarks when context switches are incorporated
    • Nov
    • R. S. Shindi and S. Cooper, "Evaluate the Performance Changes of Processor Simulator Benchmarks When Context Switches are Incorporated," Proc. ACM SIGAda '06, Nov. 2006.
    • (2006) Proc. ACM SIGAda '06
    • Shindi, R.S.1    Cooper, S.2
  • 35
    • 67650300737 scopus 로고    scopus 로고
    • Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects
    • Dept. of Computer Science, Univ. of Virginia
    • Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan, "Hotleakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects," technical report, Dept. of Computer Science, Univ. of Virginia, 2003.
    • (2003) Technical Report
    • Zhang, Y.1    Parikh, D.2    Sankaranarayanan, K.3    Skadron, K.4    Stan, M.5
  • 36
    • 77952696941 scopus 로고    scopus 로고
    • Available at
    • VAR Business, Intel Clears Up Post-Tejas Confusion, Available at http://www.varbusiness.com/sections/news/breakingnews.jhtml?articleId= 18842588, 2009.
    • (2009) Intel Clears Up Post-Tejas Confusion
    • Var, B.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.