-
1
-
-
0141775174
-
Silicon quantum wire array fabrication by electrochemical and chemical dissolution of wafers,"
-
Jul.
-
L. T. Canham, "Silicon quantum wire array fabrication by electrochemical and chemical dissolution of wafers," Appl. Phys. Lett, vol.57, no.10, pp. 1046-1.048, Jul. 1990.
-
(1990)
Appl. Phys. Lett
, vol.57
, Issue.10
, pp. 1046-1048
-
-
Canham, L.T.1
-
2
-
-
0042341742
-
2 films
-
Apr.
-
2 films," J. Appl. Phys., vol.94, no.1, pp. 254-262, Apr. 2003.
-
(2003)
J. Appl. Phys.
, vol.94
, Issue.1
, pp. 254-262
-
-
Perez-Rodriguez, A.1
Gonzalez-Varona, O.2
Garrido, B.3
Pellegrino, P.4
Morante, J.R.5
Bonafos, C.6
Carrada, M.7
Claverie, A.8
-
3
-
-
4243230684
-
Defect production and annealing in ion-irradiated Si nanocrystals
-
Apr.
-
D. Pacifici, E. C. Moreira, G. Franzo, V. Martorino, and F. Priolo, "Defect production and annealing in ion-irradiated Si nanocrystals," Phys. Rev. B, vol.65, p. 144109, Apr. 2002.
-
(2002)
Phys. Rev. B
, vol.65
, pp. 144109
-
-
Pacifici, D.1
Moreira, E.C.2
Franzo, G.3
Martorino, V.4
Priolo, F.5
-
4
-
-
0031167986
-
Room temperature operation of a quantum-dot flash memory
-
Jun.
-
J. J. Weiser, S. Tiwari, S. Rishton, K. Y. Lee, and Y. Lee, "Room temperature operation of a quantum-dot flash memory," IEEE Electron. Dev. Lett, vol 18, no.6, pp. 278-280, Jun. 1997.
-
(1997)
IEEE Electron. Dev. Lett
, vol.18
, Issue.6
, pp. 278-280
-
-
Weiser, J.J.1
Tiwari, S.2
Rishton, S.3
Lee, K.Y.4
Lee, Y.5
-
5
-
-
0030241362
-
Fast and long retention-time nano-crystal memory
-
Sep.
-
H. I. Hanafi, S. Tiwari, and I. Khan, "Fast and long retention-time nano-crystal memory," IEEE Trans. Electron Dev., vol.43, no.9, pp. 1553-1558, Sep. 1996.
-
(1996)
IEEE Trans. Electron Dev.
, vol.43
, Issue.9
, pp. 1553-1558
-
-
Hanafi, H.I.1
Tiwari, S.2
Khan, I.3
-
6
-
-
0001651260
-
Quantum, confinement in Si nanocrystals
-
Sep.
-
B. Delley and E. F. Steigmeier, "Quantum, confinement in Si nanocrystals," Phys. Rev. B, vol.47, no.3, pp. 1397-1400, Sep. 1993.
-
(1993)
Phys. Rev. B
, vol.47
, Issue.3
, pp. 1397-1400
-
-
Delley, B.1
Steigmeier, E.F.2
-
7
-
-
0000381047
-
x nanostructures
-
Feb.
-
x nanostructures," Phys. Rev. B., vol.54, no.7, pp. 5029-5036, Feb. 1996.
-
(1996)
Phys. Rev. B.
, vol.54
, Issue.7
, pp. 5029-5036
-
-
Dinh, L.N.1
Chase, L.L.2
Balooch, M.3
Siekhaus, W.J.4
Wooten, F.5
-
8
-
-
0008813837
-
Electronic states and luminescence in porous silicon quantum dots: The role of oxygen
-
Sep.
-
M. V. Wolkin, J. Jome, P. M. Fauchet, G. Allan, and C. Delerae, "Electronic states and luminescence in porous silicon quantum dots: The role of oxygen," Phys. Rev. Lett, vol.82, no.1, pp. 197-200, Sep. 1999.
-
(1999)
Phys. Rev. Lett
, vol.82
, Issue.1
, pp. 197-200
-
-
Wolkin, M.V.1
Jome, J.2
Fauchet, P.M.3
Allan, G.4
Delerae, C.5
-
9
-
-
0028514569
-
Room-temperature single-electron memory
-
Sep.
-
K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, "Room-temperature single-electron memory," IEEE Trans. Electron Devices, vol.41, no.9, pp. 1628-1638, Sep. 1994.
-
(1994)
IEEE Trans. Electron Devices
, vol.41
, Issue.9
, pp. 1628-1638
-
-
Yano, K.1
Ishii, T.2
Hashimoto, T.3
Kobayashi, T.4
Murai, F.5
Seki, K.6
-
10
-
-
0031077575
-
A room-temperature silicon single-electron metal-oxide-semiconductor memory with nanoscale floating-gate and ultranarrow channel
-
Feb.
-
L. Guo, E. Leobandung, and S. Y. Chou, "A room-temperature silicon single-electron metal-oxide-semiconductor memory with nanoscale floating-gate and ultranarrow channel," Appl. Phys. Lett., vol.70, no.7, pp. 850-852, Feb. 1997.
-
(1997)
Appl. Phys. Lett.
, vol.70
, Issue.7
, pp. 850-852
-
-
Guo, L.1
Leobandung, E.2
Chou, S.Y.3
-
12
-
-
33847766567
-
Tunneling current at the interface of silicon and silicon dioxide partly embedded with silicon nanocrystals in metal oxide semiconductor structures
-
Jan.
-
G. Chakraborty, S. Chattopadhyay, and C. K. Sarkar, "Tunneling current at the interface of silicon and silicon dioxide partly embedded with silicon nanocrystals in metal oxide semiconductor structures," J. Appl. Phys., vol.101, p. 024315, Jan. 2007.
-
(2007)
J. Appl. Phys.,.
, vol.101
, pp. 024315
-
-
Chakraborty, G.1
Chattopadhyay, S.2
Sarkar, C.K.3
-
13
-
-
33847745009
-
Enhanced Fowler-Nordheim tunneling effect in nanocrystallite Si based LED with interfacial Si nanopyramids
-
Nov.
-
G.-R. Lin, C. J. Lin, and C. K. Lin, "Enhanced Fowler-Nordheim tunneling effect in nanocrystallite Si based LED with interfacial Si nanopyramids," Opt. Expr., vol.15, no.5, pp. 2555-2563, Nov. 2007.
-
(2007)
Opt. Expr.
, vol.15
, Issue.5
, pp. 2555-2563
-
-
Lin, G.-R.1
Lin, C.J.2
Lin, C.K.3
-
14
-
-
0001638611
-
2.7-eV luminescence in as-manufactured high-purity silica glass
-
Mar.
-
R. Tohmon, Y. Shimogaichi, H. Mizuno, and Y. Ohki, "2.7-eV luminescence in as-manufactured high-purity silica glass," Phys. Rev. Lett, vol.62, no.12, pp. .1388-1391, Mar. 1989.
-
(1989)
Phys. Rev. Lett
, vol.62
, Issue.12
, pp. 1388-1391
-
-
Tohmon, R.1
Shimogaichi, Y.2
Mizuno, H.3
Ohki, Y.4
-
15
-
-
15744369033
-
Oxygen-deficient centers and excess Si in buried oxide using photoluminescence spectroscopy
-
Dec.
-
H. Nishikawa, R. E. Stahlbush, and J. H. Stathis, "Oxygen-deficient centers and excess Si in buried oxide using photoluminescence spectroscopy," Phys. Rev. B, vol.60, no.23, pp. 15910-15918, Dec. 1999.
-
(1999)
Phys. Rev. B
, vol.60
, Issue.23
, pp. 15910-15918
-
-
Nishikawa, H.1
Stahlbush, R.E.2
Stathis, J.H.3
-
17
-
-
33748912562
-
Single electron charging and transport in silicon rich oxide
-
Jul.
-
Y. Zhenrui, A.-M. Mariano, and A. I. C. Marco, "Single electron charging and transport in silicon rich oxide," Nanotechnology, vol.17, pp. 3962-3967, Jul. 2006.
-
(2006)
Nanotechnology
, vol.17
, pp. 3962-3967
-
-
Zhenrui, Y.1
Mariano, A.-M.2
Marco, A.I.C.3
-
18
-
-
0032621326
-
Effects of interface traps on charge retention characteristics in silicon-quantum-dot-based metal-oxide-semiconductor diodes
-
Jan.
-
Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, "Effects of interface traps on charge retention characteristics in silicon-quantum-dot-based metal-oxide-semiconductor diodes," Jpn. J. Appl. Phys., vol. 38, no. 1B, pp. 425-428, Jan. 1999.
-
(1999)
Jpn. J. Appl. Phys.
, vol.38
, Issue.1 B
, pp. 425-428
-
-
Shi, Y.1
Saito, K.2
Ishikuro, H.3
Hiramoto, T.4
-
19
-
-
36449008130
-
A silicon nanocrystals based memory
-
Mar.
-
S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. F. Crabbe, and K. Chan, "A silicon nanocrystals based memory," Appl. Phys. Lett., vol.68, no.10, pp. 1377-1379, Mar. 1996.
-
(1996)
Appl. Phys. Lett.
, vol.68
, Issue.10
, pp. 1377-1379
-
-
Tiwari, S.1
Rana, F.2
Hanafi, H.3
Hartstein, A.4
Crabbe, E.F.5
Chan, K.6
-
20
-
-
0029775699
-
2 superlattices
-
Sep.
-
2 superlattices," Phys. Rev. Lett, vol.76, no.3, pp. 539-541, Sep. 1996.
-
(1996)
Phys. Rev. Lett
, vol.76
, Issue.3
, pp. 539-541
-
-
Lockwood, D.J.1
Lu, Z.H.2
Baribeau, J.-M.3
-
21
-
-
33745134383
-
2 memory with fast erase, large DVth and good retention
-
Jun.
-
2 memory with fast erase, large DVth and good retention," in Symp. VLSI Tech. Dig., Jun. 2005, pp. 210-211.
-
(2005)
Symp. VLSI Tech. Dig.
, pp. 210-211
-
-
Lai, C.H.1
Chin, A.2
Chiang, K.C.3
Yoo, W.J.4
Cheng, C.F.5
McAlister, S.P.6
Chi, C.C.7
Wu, P.8
-
22
-
-
34548010241
-
3 gate layers
-
3 gate layers," Solid State Commun., vol.143, pp. 550-552, 2007.
-
(2007)
Solid State Commun.
, vol.143
, pp. 550-552
-
-
Park, B.1
Choia, S.2
Lee, H.-R.3
Choa, K.4
Kima, S.5
-
23
-
-
0038665192
-
Rapidthermal-annealing effect on lateral charge loss in metal-oxide-semiconductor capacitors with Ge nanocrystals
-
Apr
-
J. K. Kim, H. J. Cheong, Y. Kim, J. Y. Yi, and H. J. Park, "Rapidthermal-annealing effect on lateral charge loss in metal-oxide-semiconductor capacitors with Ge nanocrystals," Appl. Phys. Lett., vol.82, no.15, pp. 2527-2529, Apr. 2003.
-
(2003)
Appl. Phys. Lett.
, vol.82
, Issue.15
, pp. 2527-2529
-
-
Kim, J.K.1
Cheong, H.J.2
Kim, Y.3
Yi, J.Y.4
Park, H.J.5
-
24
-
-
34047177894
-
Nanoscale electrical characterization of Si-nc based memory metal-oxide-semiconductor devices
-
Mar.
-
M. Porti, M. Avidano, M. Nafria, and X. Aymerich, "Nanoscale electrical characterization of Si-nc based memory metal-oxide-semiconductor devices," J. Appl. Phys., vol.101, p. 064509, Mar. 2007.
-
(2007)
J. Appl. Phys.
, vol.101
, pp. 064509
-
-
Porti, M.1
Avidano, M.2
Nafria, M.3
Aymerich, X.4
-
25
-
-
0036643836
-
Concept of floating-dot memory transistors on silicon-on-insulator substrate
-
Jul.
-
O. Winkler, F. Merget, M. Heuser, B. Hadam, M. Baus, B. Spangenberg, and H. Kurz, "Concept of floating-dot memory transistors on silicon-on-insulator substrate," Microelectron. Eng., vol. 61, pp. 497-503, Jul. 2002.
-
(2002)
Microelectron. Eng.
, vol.61
, pp. 497-503
-
-
Winkler, O.1
Merget, F.2
Heuser, M.3
Hadam, B.4
Baus, M.5
Spangenberg, B.6
Kurz, H.7
|