A CMOS vision system on-chip with multicore sensory processing architecture for image analysis above 1,000F/s

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7536, Issue , 2010, Pages

  Rodríguez Vázquez, Angel ^a,b   Domínguez Castro, Rafael ^a,b   Jiménez Garrido, Francisco ^b   Morillas, Sergio ^b  

^a UNIVERSITY OF SEVILLE   (Spain)

^b Anafocus   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUDGET CONTROL; CAMERAS; CMOS INTEGRATED CIRCUITS; COMPUTER VISION; DISTRIBUTED COMPUTER SYSTEMS; ELECTRON BEAM LITHOGRAPHY; IMAGE ACQUISITION; PROGRAMMABLE LOGIC CONTROLLERS; REACTION RATES; SENSORY ANALYSIS; SYSTEM-ON-CHIP;

DIGITAL MICROPROCESSORS; DISTRIBUTED PROCESSING; PARALLEL PROCESSING; POST-PROCESSING STAGES; PRE-PROCESSING STAGES; READ-OUT STRUCTURES; SIGNAL ACQUISITIONS; VISION SYSTEM ON-CHIP;

COMPUTER ARCHITECTURE;

EID: 77949330140     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.839183     Document Type: Conference Paper

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