Using transition test to understand timing behavior of logic circuits on UltraSPARC™T2 family

Proceedings - International Test Conference

Volumn , Issue , 2009, Pages

  Chen, Liang Chi ^a   Dickinson, Paul ^a   Dahlgren, Peter ^a   Davidson, Scott ^a   Caty, Olivier ^a   Wu, Kevin ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COUPLING NOISE; DELAY TESTS; ON CHIPS; PATH DELAY TEST; ROOT CAUSE; SPEED BINNING; TRANSITION DELAY TEST; TRANSITION TESTS; ULTRASPARC;

LOGIC CIRCUITS; SWITCHING CIRCUITS; TIME MEASUREMENT; TIMING CIRCUITS;

TESTING;

EID: 76549103774     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2009.5355655     Document Type: Conference Paper

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