Border traps in Al2 O3 / In0.53 Ga 0.47 As (100) gate stacks and their passivation by hydrogen anneals

Applied Physics Letters

Volumn 96, Issue 1, 2010, Pages

  Kim, Eun Ji ^a   Wang, Lingquan ^b   Asbeck, Peter M ^b   Saraswat, Krishna C ^a   McIntyre, Paul C ^a  

^a Stanford University   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC LAYER DEPOSITED; BORDER TRAPS; CAPACITANCE VOLTAGE; CAPACITANCE VOLTAGE MEASUREMENTS; CARRIER GENERATION; DEFECT STATE; FREQUENCY DISPERSION; GATE STACKS; METAL-OXIDE-SEMICONDUCTOR CAPACITORS; OXIDE/SEMICONDUCTOR INTERFACES; REDUCED FREQUENCY;

ALUMINUM; DEFECTS; DISPERSIONS; HYDROGEN; PASSIVATION;

CAPACITANCE;

EID: 75749127285     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.3281027     Document Type: Article

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