Mapping algorithms for NoC-based heterogeneous MPSoC platforms

12th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2009

Volumn , Issue , 2009, Pages 133-140

  Singh, Amit Kumar ^a   Jigang, Wu ^a   Prakash, Alok ^a   Srikanthan, Thambipillai ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Mapping algorithms; Multiprocessor System on Chip (MPSoC) design; Network on Chip (NoC); Run time mapping

Indexed keywords

CHANNEL LOADS; CLOSE PROXIMITY; COMMUNICATION OVERHEADS; EXECUTION TIME; MAPPING ALGORITHMS; MULTIPROCESSOR SYSTEM ON CHIPS; MULTIPROCESSOR SYSTEM-ON-CHIP DESIGNS; NETWORK ON CHIP; REAL TIME CONSTRAINTS; RECONFIGURABLE PROCESSING; RUN-TIME MAPPING; RUNTIMES;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CONFORMAL MAPPING; DESIGN; ELECTRIC NETWORK TOPOLOGY; HEURISTIC METHODS; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; RECONFIGURABLE HARDWARE;

MULTIPROCESSING SYSTEMS;

EID: 74549146850     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2009.145     Document Type: Conference Paper

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