Communication-driven task binding for multiprocessor with latency insensitive Network-on-Chip

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 1, Issue , 2005, Pages 39-44

  Lin, Liang Yu ^a   Wang, Cheng Yeh ^a   Huang, Pao Jui ^a   Chou, Chih Chieh ^a   Jou, Jing Yang ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; MULTIPROCESSING SYSTEMS; NETWORK-ON-CHIP; PROGRAMMABLE LOGIC CONTROLLERS; REUSABILITY; SCHEDULING ALGORITHMS; SERVERS;

2D MESHES; COMMUNICATION RESOURCES; CORE BASED SYSTEM ON CHIPS; DESIGN PARADIGM; DIVIDE AND CONQUER; MULTIPROCESSOR SYSTEM ON CHIPS; ROUND-ROBIN SCHEDULING; SYSTEM THROUGHPUT;

INTEGRATED CIRCUIT DESIGN;

EID: 77955709745     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120739     Document Type: Conference Paper

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