메뉴 건너뛰기




Volumn , Issue , 2009, Pages 28-35

Ultra-thin chips and related applications, a new paradigm in silicon technology

Author keywords

[No Author keywords available]

Indexed keywords

DEVICE INTEGRATION; ENABLING TECHNOLOGIES; NEW APPLICATIONS; SILICON TECHNOLOGIES; THIN WAFERS; ULTRA-THIN CHIPS;

EID: 72849110691     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2009.5326011     Document Type: Conference Paper
Times cited : (20)

References (33)
  • 1
    • 0020127035 scopus 로고
    • Silicon as a mechanical material
    • K. Peterson, "Silicon as a mechanical material", Proc. IEEE, vol. 70, no. 5, 1982, pp. 420-457.
    • (1982) Proc. IEEE , vol.70 , Issue.5 , pp. 420-457
    • Peterson, K.1
  • 2
    • 50249151871 scopus 로고    scopus 로고
    • Overview and emerging challenges in wafer thinning process for handheld applications
    • V.P. Ganesh and C. Lee, "Overview and emerging challenges in wafer thinning process for handheld applications", Proc. Int. Electr. Manuf. Techn., 2006, pp. 20-26.
    • (2006) Proc. Int. Electr. Manuf. Techn , pp. 20-26
    • Ganesh, V.P.1    Lee, C.2
  • 3
    • 33750592887 scopus 로고    scopus 로고
    • Three-dimensional integration technology based on wafer bonding with vertical buried interconnections
    • November
    • M. Koyanagi, T. Nakamura, Y. Yamada, H. Kikuchi, T. Fukushima, T. Tanaka, and H. Kurino, "Three-dimensional integration technology based on wafer bonding with vertical buried interconnections", IEEE Trans. El. Dev., vol. 53, no. 11, November 2006, pp. 2799-2808.
    • (2006) IEEE Trans. El. Dev , vol.53 , Issue.11 , pp. 2799-2808
    • Koyanagi, M.1    Nakamura, T.2    Yamada, Y.3    Kikuchi, H.4    Fukushima, T.5    Tanaka, T.6    Kurino, H.7
  • 5
    • 23744468039 scopus 로고    scopus 로고
    • Polymer electronics systems - polytronics
    • August
    • K. Bock, "Polymer electronics systems - polytronics", Proc. IEEE, vol. 93, no. 8, August 2005, pp. 1400-1406.
    • (2005) Proc. IEEE , vol.93 , Issue.8 , pp. 1400-1406
    • Bock, K.1
  • 6
    • 34547262421 scopus 로고    scopus 로고
    • J.N. Burghartz, H.-G. Graf, C. Harendt,. Klingler, H. Richter, M. Strobel, HDR CMOS imager and their applications, Proc. Int. Conf. on Sol. St. and Integr. Circ Tech. (ICSICT), 2006, pp. 528-531.
    • J.N. Burghartz, H.-G. Graf, C. Harendt,. Klingler, H. Richter, M. Strobel, "HDR CMOS imager and their applications", Proc. Int. Conf. on Sol. St. and Integr. Circ Tech. (ICSICT), 2006, pp. 528-531.
  • 8
    • 72849147226 scopus 로고    scopus 로고
    • International Technology roadmap for semiconductors ITRS
    • International Technology roadmap for semiconductors (ITRS), www.irs.net.
  • 9
    • 33750592887 scopus 로고    scopus 로고
    • Three-dimensional integration technology based on wafer bonding with vertical buried interconnections
    • November
    • M. Koyanagi, T. Nakamura, Y. Yamada, H. Kikuchi, T. Fukushima, T. Tanaka, and H. Kurino, "Three-dimensional integration technology based on wafer bonding with vertical buried interconnections", IEEE Trans. El. Dev., vol. 53, no. 11, November 2006, pp. 2799-2808.
    • (2006) IEEE Trans. El. Dev , vol.53 , Issue.11 , pp. 2799-2808
    • Koyanagi, M.1    Nakamura, T.2    Yamada, Y.3    Kikuchi, H.4    Fukushima, T.5    Tanaka, T.6    Kurino, H.7
  • 11
    • 33947407658 scopus 로고    scopus 로고
    • Three-dimensional integrated circuits and the future of system-on-chip designs
    • June
    • R.S. Patti, "Three-dimensional integrated circuits and the future of system-on-chip designs" Proc. IEEE, vol. 94, no. 6, June 2006, pp. 1214-1224.
    • (2006) Proc. IEEE , vol.94 , Issue.6 , pp. 1214-1224
    • Patti, R.S.1
  • 12
    • 0035121216 scopus 로고    scopus 로고
    • Smart dust: Communicating with a cubic millimeter
    • vo
    • B. Warnecke, M. Last, B. Liebowitz, K.S.J. Pister, "Smart dust: communicating with a cubic millimeter", Computer, vo. 34, 2001, pp. 44-51.
    • (2001) Computer , vol.34 , pp. 44-51
    • Warnecke, B.1    Last, M.2    Liebowitz, B.3    Pister, K.S.J.4
  • 14
    • 46049098824 scopus 로고    scopus 로고
    • B. Swinnen, W. Ruythooren, P. DeMoor, L. Bogaerts, L. Carbonell, K. De Munck, B. Eyckens, S. Stoukatch, D. Sabuncuoglu Tezcan, Z. Tokei, J. Vaes, J. Van Aelst, E. Beyne, 3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias, in Techn. Dig. Int. E1. Dev. Mtg. (IEDM), 2006, pp. 371-380.
    • B. Swinnen, W. Ruythooren, P. DeMoor, L. Bogaerts, L. Carbonell, K. De Munck, B. Eyckens, S. Stoukatch, D. Sabuncuoglu Tezcan, Z. Tokei, J. Vaes, J. Van Aelst, E. Beyne, "3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias", in Techn. Dig. Int. E1. Dev. Mtg. (IEDM), 2006, pp. 371-380.
  • 15
    • 72449162196 scopus 로고    scopus 로고
    • Sustrate transfer technology
    • PhD thesis, TU Delft, The Netherlands, 2 June
    • R. Dekker, "Sustrate transfer technology", PhD thesis, TU Delft, The Netherlands, 2 June 2004.
    • (2004)
    • Dekker, R.1
  • 17
    • 59849109089 scopus 로고    scopus 로고
    • A new fabrication and assembly process for ultra-thin chips
    • J.N. Burghartz, W. Appel, H. Rempp, M. Zimmermann, "A new fabrication and assembly process for ultra-thin chips", IEEE Trans. E1. Dev., vol. 56, no. 2, 2008, pp. 321-327.
    • (2008) IEEE Trans. E1. Dev , vol.56 , Issue.2 , pp. 321-327
    • Burghartz, J.N.1    Appel, W.2    Rempp, H.3    Zimmermann, M.4
  • 21
    • 72849125341 scopus 로고    scopus 로고
    • German Patent DE 4241045
    • F. Lärmer and A. Schilp, German Patent DE 4241045.
    • Lärmer, F.1    Schilp, A.2
  • 22
    • 64549139638 scopus 로고    scopus 로고
    • F. Liu, R.R. Yu, A.M. Young, J.P. Doyle, X. Wang, L. Shi, K.-N. Chen, X. Li, D.A. Dipaola, D. Brown, C.T. Ryan, J.A. Hagan, K.H. Wong, M. Lu, X. Gu, N.R. Klymko, E.D. Perfecto, A.G. Merryman, K.A. Kelly, S. Purushothaman, S.J. Koester, R. Wisnieff, W. Haensch; A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via and hybrid Cu-adhesive bonding, in Techn. Dig. Int. E1. Dev. Mtg. (IEDM), 2008, pp. 1-4.
    • F. Liu, R.R. Yu, A.M. Young, J.P. Doyle, X. Wang, L. Shi, K.-N. Chen, X. Li, D.A. Dipaola, D. Brown, C.T. Ryan, J.A. Hagan, K.H. Wong, M. Lu, X. Gu, N.R. Klymko, E.D. Perfecto, A.G. Merryman, K.A. Kelly, S. Purushothaman, S.J. Koester, R. Wisnieff, W. Haensch; "A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via and hybrid Cu-adhesive bonding", in Techn. Dig. Int. E1. Dev. Mtg. (IEDM), 2008, pp. 1-4.
  • 24
    • 51349132537 scopus 로고    scopus 로고
    • Through silicon via technology-processes and reliability for wafer-level 3D system integration
    • ECTC
    • P. Ramm, M.J. Wolf, A. Klumpp, R. Wieland, B. Wunderle, B. Michel, "Through silicon via technology-processes and reliability for wafer-level 3D system integration", Proc. E1. Comp. Techn. Conf. (ECTC), 2008, pp. 841-846.
    • (2008) Proc. E1. Comp. Techn. Conf , pp. 841-846
    • Ramm, P.1    Wolf, M.J.2    Klumpp, A.3    Wieland, R.4    Wunderle, B.5    Michel, B.6
  • 26
    • 0032672026 scopus 로고    scopus 로고
    • Fast organic thin-film transistor circuits, IEEE E1
    • H. Klauk, D.J. Gundlach, Th.N. Jackson, "Fast organic thin-film transistor circuits", IEEE E1. Dev. Lett., vol. 20, no. 6, 1999, pp. 289-291.
    • (1999) Dev. Lett , vol.20 , Issue.6 , pp. 289-291
    • Klauk, H.1    Gundlach, D.J.2    Jackson, T.N.3
  • 27
  • 28
    • 35348906114 scopus 로고    scopus 로고
    • Low-voltage organic thin-film transistors with large transconductance
    • 074514-2
    • H. Klauk, U. Zschieschang, M. Halik, "Low-voltage organic thin-film transistors with large transconductance", J. Appl. Phys., vol. 102, 2007, pp. 074514-1 - 074514-2.
    • (2007) J. Appl. Phys , vol.102 , pp. 074514-74521
    • Klauk, H.1    Zschieschang, U.2    Halik, M.3
  • 29
    • 33847111592 scopus 로고    scopus 로고
    • Ultralow-power organic complementary circuits
    • H. Klauk, U. Zschieschang, J. Pflaum, M. Halik, "Ultralow-power organic complementary circuits", Nature, vol. 445, 2007, pp. 745-748.
    • (2007) Nature , vol.445 , pp. 745-748
    • Klauk, H.1    Zschieschang, U.2    Pflaum, J.3    Halik, M.4
  • 30
    • 0036867982 scopus 로고    scopus 로고
    • Complementary metal-oxide-semiconductor thin film transistor circuits from a high temperature polycrystalline silicon process on steel foil substrates
    • M. Wu, X.-Z. Bo, J.C. Sturm, S. Wagner, "Complementary metal-oxide-semiconductor thin film transistor circuits from a high temperature polycrystalline silicon process on steel foil substrates", IEEE Trans. E1. Dev., vol. 49, 2002, pp. 1993-2000.
    • (2002) IEEE Trans. E1. Dev , vol.49 , pp. 1993-2000
    • Wu, M.1    Bo, X.-Z.2    Sturm, J.C.3    Wagner, S.4
  • 31
    • 33744527475 scopus 로고    scopus 로고
    • Dyanamic characteristics of MICC polycrystalline thin film transistors
    • Y.-D. Son, K.-D. Yang, B.-S. Bae, K.-Ch. Park, J. Jang, "Dyanamic characteristics of MICC polycrystalline thin film transistors", J. Non-Cryst. Solids, vol. 352, 2006, pp. 1745-1748.
    • (2006) J. Non-Cryst. Solids , vol.352 , pp. 1745-1748
    • Son, Y.-D.1    Yang, K.-D.2    Bae, B.-S.3    Park, K.-C.4    Jang, J.5
  • 32
    • 0035250369 scopus 로고    scopus 로고
    • High-performance CMOS circuits fabricated by excimer-laser-annealed poly-Si TFTs on glass substrates, IEEE E1
    • Y. Mishima, K. Yoshino, F. Takeuchi, K. Ohgata, M. Takei, and N. Sasaki, "High-performance CMOS circuits fabricated by excimer-laser-annealed poly-Si TFTs on glass substrates", IEEE E1. Dev. Lett., vol. 22, no. 2, 2001, pp.89-91.
    • (2001) Dev. Lett , vol.22 , Issue.2 , pp. 89-91
    • Mishima, Y.1    Yoshino, K.2    Takeuchi, F.3    Ohgata, K.4    Takei, M.5    Sasaki, N.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.