Controlled-width track in through silicon via using 3D holographic photolithography with modified electrodepositable photoresist

Journal of Micromechanics and Microengineering

Volumn 20, Issue 1, 2010, Pages

  Toriz Garcia, J J ^a   Williams, G L ^a   McWilliam, R ^b   Curry, R ^b   Seed, N L ^a   Purvis, A ^b   Ivey, P A ^c  

^a UNIVERSITY OF SHEFFIELD   (United Kingdom)

^b DURHAM UNIVERSITY   (United Kingdom)

^c Innotec Ltd   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

3-D SUBSTRATE; COATING TEMPERATURE; ELECTRONIC PACKAGE; EXPOSURE TOOL; HIGH-DENSITY; HOLOGRAPHIC PHOTOLITHOGRAPHY; LINE BROADENING; LITHOGRAPHIC PROCESS; M-LINES; MICROMACHINED SILICON; NON-PLANAR SURFACES; PRE-EXPOSURE; RESOLUTION LIMITS; SIMULATION RESULT; THROUGH-SILICON-VIA;

COMPUTER GENERATED HOLOGRAPHY; PHOTOLITHOGRAPHY; PHOTORESISTORS; SEMICONDUCTING SILICON COMPOUNDS; SURFACE TREATMENT; THREE DIMENSIONAL;

SILICON WAFERS;

EID: 70949102296     PISSN: 09601317     EISSN: 13616439     Source Type: Journal    
DOI: 10.1088/0960-1317/20/1/015012     Document Type: Article

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