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Applied Physics Letters

Volumn 95, Issue 17, 2009, Pages

Impact of Sn/Zn ratio on the gate bias and temperature-induced instability of Zn-In-Sn-O thin film transistors

(5) Ryu, Min Ki a Yang, Shinhyuk a Park, Sang Hee Ko a Hwang, Chi Sun a Jeong, Jae Kyeong b

a Electronics and Telecommunications Research Institute (ETRI) (South Korea)

b Inha University (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DEEP LEVEL TRAP; DEVICE STABILITY; GATE BIAS; GATE VOLTAGES; STABILITY ENHANCEMENT; SUB-THRESHOLD CURRENT; TEMPERATURE RANGE; TEMPERATURE STABILITY; TEMPERATURE-INDUCED; TRAP DENSITY;

AMORPHOUS FILMS; CHARGE TRAPPING; GALLIUM; SYSTEM STABILITY; THIN FILM TRANSISTORS; THIN FILMS; ZINC;

TIN;

EID: 70350728609 PISSN: 00036951 EISSN: None Source Type: Journal
DOI: 10.1063/1.3257726 Document Type: Article

Times cited : (104)

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