Field enhancement for dielectric layer of high-voltage devices on silicon on insulator

IEEE Transactions on Electron Devices

Volumn 56, Issue 10, 2009, Pages 2327-2334

  Zhang, Bo ^a   Li, Zhaoji ^a   Hu, Shengdong ^a   Luo, Xiaorong ^a  

^a UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA   (China)

Author keywords

Dielectric layer field; High voltage device; Interface charge; Low k (LK); Silicon critical electric field; Silicon on insulator (SOI)

Indexed keywords

DIELECTRIC LAYER FIELD; HIGH-VOLTAGE DEVICE; INTERFACE CHARGE; LOW K (LK); SILICON ON INSULATOR (SOI);

DIELECTRIC PROPERTIES; ELECTRIC FIELD MEASUREMENT; HETEROJUNCTION BIPOLAR TRANSISTORS;

ELECTRIC FIELDS;

EID: 70350057093     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2028405     Document Type: Article

References (20)

1. S. Merchant, E. Arnold, and H. Baumgart, "Realization of high breakdown voltage (>700 V) in thin SOI devices," in Proc. Int. Symp. Power Semicond. Devices ICs, 1991, pp. 31-35.
2. A. Nakagawa, N. Yasuhara, and Y. Baba, "Breakdown voltage enhancement for devices on thin silicon layer/silicon dioxide film," IEEE Trans. Electron Devices, vol. 38, no. 7, pp. 1650-1654, Jul. 1991.
3. H. Funaki, Y. Yamaguchi, K. Hirayama, and A. Nakagawa, "New 1200 V MOSFET structure on SOI with SIPOS shielding layer," in Proc. Int. Symp. Power Semicond. Devices ICs, 1998, pp. 25-28.
4. H. Kapels, R. Plikat, and D. Silber, "Dielectric charge traps: A new structure element for power devices," in Proc. Int. Symp. Power Semicond. Devices ICs, 2000, pp. 205-208.
5. Y. Guo, Z. Li, B. Zhang, and J. Fang, "Breakdown model and new structure of SOI high voltage devices with step buried oxide fixed charges," Chin. J. Semicond., vol. 25, no. 12, pp. 1695-1700, Dec. 2004.
6. X. Luo, B. Zhang, and Z. Li, "A new structure and its analytical model for the electric field and breakdown voltage of SOI high voltage device with variable-k dielectric buried layer," Solid State Electron., vol. 51, no. 3, pp. 493-499, Mar. 2007.
7. Z. Li, B. Zhang, X. Luo, S. Hu, J. Fang, Z. Li, M. Qiao, and Y. Guo, "The rule of field enhancement for buried dielectric layer of SOI high voltage devices," in Proc. Int. Conf. Commun., Circuits Syst., Fukuoka, Japan, 2007, pp. 1320-1323.
8. R. Van Overstraeten and H. DeMan, "Measurement of the ionization rates in diffused silicon p-n junctions," Solid State Electron., vol. 13, no. 5, pp. 583-608, 1970.
9. W. Fulop, "Calculation of avalanche breakdown voltages of silicon p-n junctions," Solid State Electron., vol. 10, no. 1, pp. 39-43, 1967.
10. S. D. Zhang, J. K. O. Sin, T. M. L. Lai, and P. K. Ko, "Numerical model of linear doping profiles for high-voltage thin-film SOI devices," IEEE Trans. Electron Devices, vol. 46, no. 5, pp. 1036-1041, May 1999.
11. A. S. Grove, Physics and Technology of Semiconductor Devices. New York: Wiley, 1967, p. 193.
12. S. L. Miller, "Avalanche breakdown in germanium," Phys. Rev., vol. 99, no. 4, pp. 1234-1241, Apr. 1955.
13. S. M. Sze and G. Gibbons, "Avalanche breakdown voltage of abrupt and linearly graded p-n junctions in Ge, Si, GaAs, and GaP," Appl. Phys. Lett., vol. 8, no. 5, pp. 111-113, May 1966.
14. A. Nakagawa, Y. Yamaguchi, and N. Yasuhara, "New high voltage SOI devices structure eliminating substrate bias effects," in IEDM Tech. Dig., 1996, pp. 477-483.
15. X. Luo, B. Zhang, Z. Li, W. Zhang, Z. Zhan, and H. Xu, "SOI high-voltage devices with step thickness sustained voltage layer," Electron. Lett., vol. 44, no. 1, pp. 55-56, Jan. 2008.
16. R. Sunkavalli, A. Tamba, and B. J. Baliga, "Step drift doping profile for high voltage DI lateral power devices," in Proc. Int. SOI Conf. Tucson, AZ, 1995, pp. 139-140.
17. X. Luo, Z. Li, B. Zhang, Y. Guo, and X. Tang, "A novel structure and its breakdown mechanism of SOI high voltage device with shielding trench," Chin. J. Semicond., vol. 26, no. 11, pp. 2154-2158, Nov. 2005.
18. X. Luo, B. Zhang, Z. Li, Y. Guo, X. Tang, and Y. Liu, "A novel 700-V SOI LDMOS with double-side trench," IEEE Electron Device Lett., vol. 28, no. 5, pp. 422-424, May 2007.
19. B. Duan, B. Zhang, and Z. Li, "New thin-film power MOSFETS with a buried oxide double step structure," IEEE Electron Device Lett., vol. 27, no. 5, pp. 377-379, May 2006.
20. X. Luo, B. Zhang, and Z. Li, "New high-voltage (> 1200 V) MOSFET with the charge trenches on partial SOI," IEEE Trans. Electron Devices vol. 55, no. 7, pp. 1756-1761, Jul. 2008.