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Volumn 1, Issue , 2008, Pages

Portfolio of FinFET memories: Innovative techniques for an emerging technology

Author keywords

[No Author keywords available]

Indexed keywords

DATA ACCESS; EMERGING TECHNOLOGIES; FINFET MEMORY; IDLE MODE; LEAKAGE POWER CONSUMPTION; LOW THRESHOLDS; MEMORY CIRCUITS; READ STABILITY; SRAM CELL; WRITE OPERATIONS;

EID: 69949106802     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCDC.2008.4815583     Document Type: Conference Paper
Times cited : (21)

References (12)
  • 1
    • 1842865629 scopus 로고    scopus 로고
    • Turning silicon on its edge
    • January/February
    • E. Nowak et al., "Turning Silicon on Its Edge," IEEE Circuits & Device Magazine, pp. 20-31, January/February 2004.
    • (2004) IEEE Circuits & Device Magazine , pp. 20-31
    • Nowak, E.1
  • 3
    • 34249803816 scopus 로고    scopus 로고
    • Cointegration of high-performance tied-gate three-terminal FinFETs and variable threshold-voltage independent-gate four-terminal FinFETs with asymmetric gate-oxide thicknesses
    • DOI 10.1109/LED.2007.896898
    • Y. Liu et al., "Cointegration of High-Performance Tied-Gate Three- Terminal FinFETs and Variable Threshold-Voltage Independent-Gate Four-Terminal FinFETs with Asymmetric Gate-Oxide Thicknesses," IEEE Electron Device Letters, Vol.28, No. 6, pp. 517-519, June 2007. (Pubitemid 46846010)
    • (2007) IEEE Electron Device Letters , vol.28 , Issue.6 , pp. 517-519
    • Liu, Y.1    Matsukawa, T.2    Endo, K.3    Masahara, M.4    O'uchi, S.-I.5    Ishii, K.6    Yamauchi, H.7    Tsukada, J.8    Ishikawa, Y.9    Suzuki, E.10
  • 8
    • 34548818512 scopus 로고    scopus 로고
    • A comparative study of 6T and 4T SRAM cells in double-gate CMOS with statistical variation
    • 4253315, 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
    • B. Giraud et al., "A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation," Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 3022-3025, May 2007. (Pubitemid 47449185)
    • (2007) Proceedings - IEEE International Symposium on Circuits and Systems , pp. 3022-3025
    • Giraud, B.1    Amara, A.2    Vladimirescu, A.3
  • 10
    • 51749107243 scopus 로고    scopus 로고
    • Work-function engineering for reduced power and higher integration density: An Alternative to Sizing for Stability in FinFET Memory Circuits
    • May
    • S. A. Tawfik and V. Kursun, "Work-Function Engineering for Reduced Power and Higher Integration Density: An Alternative to Sizing for Stability in FinFET Memory Circuits," Proceedings of the IEEE International Symposium on Circuits and Systems, pp.788-791, May 2008.
    • (2008) Proceedings of the IEEE International Symposium on Circuits and Systems , pp. 788-791
    • Tawfik, S.A.1    Kursun, V.2
  • 11
    • 0035525694 scopus 로고    scopus 로고
    • Work function engineering of molybdenum gate electrodes by nitrogen implantation
    • November
    • P. Ranade et al., "Work Function Engineering of Molybdenum Gate Electrodes by Nitrogen Implantation," Electrochemical and Solid-State Letters, Vol.4, Issue 11, pp. G85-G87, November 2001.
    • (2001) Electrochemical and Solid-State Letters , vol.4 , Issue.11
    • Ranade, P.1
  • 12
    • 0036923594 scopus 로고    scopus 로고
    • Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
    • December
    • J. Kedzierski et al., "Metal-gate FinFET and Fully-Depleted SOI Devices Using Total Gate Silicidation," Proceedings of the IEEE Electron Devices Meeting, pp. 247-250, December 2002.
    • (2002) Proceedings of the IEEE Electron Devices Meeting , pp. 247-250
    • Kedzierski, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.