-
1
-
-
1842865629
-
Turning silicon on its edge
-
January/February
-
E. Nowak et al., "Turning Silicon on Its Edge," IEEE Circuits & Device Magazine, pp. 20-31, January/February 2004.
-
(2004)
IEEE Circuits & Device Magazine
, pp. 20-31
-
-
Nowak, E.1
-
2
-
-
18044390851
-
4-terminal FinFETs with high threshold voltage controllability
-
VI.B.-1, Device Research Conference - Conference Digest, 62nd DRC
-
Y. X. Liu et al., "4-Terminal FinFETs with High Threshold Voltage Controllability," Proceedings of the IEEE Device Research Conference, Vol.1, pp. 207-208, June 2004. (Pubitemid 40601170)
-
(2004)
Device Research Conference - Conference Digest, DRC
, pp. 207-208
-
-
Liu, Y.X.1
Masahara, M.2
Ishii, K.3
Sekigawa, T.4
Takashima, H.5
Yamauchi, H.6
Tsutsumi, T.7
Sakamoto, K.8
Suzuki, E.9
-
3
-
-
34249803816
-
Cointegration of high-performance tied-gate three-terminal FinFETs and variable threshold-voltage independent-gate four-terminal FinFETs with asymmetric gate-oxide thicknesses
-
DOI 10.1109/LED.2007.896898
-
Y. Liu et al., "Cointegration of High-Performance Tied-Gate Three- Terminal FinFETs and Variable Threshold-Voltage Independent-Gate Four-Terminal FinFETs with Asymmetric Gate-Oxide Thicknesses," IEEE Electron Device Letters, Vol.28, No. 6, pp. 517-519, June 2007. (Pubitemid 46846010)
-
(2007)
IEEE Electron Device Letters
, vol.28
, Issue.6
, pp. 517-519
-
-
Liu, Y.1
Matsukawa, T.2
Endo, K.3
Masahara, M.4
O'uchi, S.-I.5
Ishii, K.6
Yamauchi, H.7
Tsukada, J.8
Ishikawa, Y.9
Suzuki, E.10
-
4
-
-
34548853435
-
Leakage-aware design of nanometer SoC
-
4253367, 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
-
V. Kursun, S. A. Tawfik, and Z. Liu, "Leakage-Aware Design of Nanometer SoC," Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 3231-3234, May 2007. (Pubitemid 47449237)
-
(2007)
Proceedings - IEEE International Symposium on Circuits and Systems
, pp. 3231-3234
-
-
Kursun, V.1
Tawfik, S.A.2
Liu, Z.3
-
6
-
-
49749147773
-
An independent-gate FinFET SRAM cell for high data stability and enhanced integration density
-
September
-
Z. Liu, S. A. Tawfik, and V. Kursun, "An Independent-Gate FinFET SRAM Cell for High Data Stability and Enhanced Integration Density," Proceedings of the IEEE International Systems on Chip (SOC) Conference, pp. 63-66, September 2007.
-
(2007)
Proceedings of the IEEE International Systems on Chip (SOC) Conference
, pp. 63-66
-
-
Liu, Z.1
Tawfik, S.A.2
Kursun, V.3
-
8
-
-
34548818512
-
A comparative study of 6T and 4T SRAM cells in double-gate CMOS with statistical variation
-
4253315, 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
-
B. Giraud et al., "A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation," Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 3022-3025, May 2007. (Pubitemid 47449185)
-
(2007)
Proceedings - IEEE International Symposium on Circuits and Systems
, pp. 3022-3025
-
-
Giraud, B.1
Amara, A.2
Vladimirescu, A.3
-
10
-
-
51749107243
-
Work-function engineering for reduced power and higher integration density: An Alternative to Sizing for Stability in FinFET Memory Circuits
-
May
-
S. A. Tawfik and V. Kursun, "Work-Function Engineering for Reduced Power and Higher Integration Density: An Alternative to Sizing for Stability in FinFET Memory Circuits," Proceedings of the IEEE International Symposium on Circuits and Systems, pp.788-791, May 2008.
-
(2008)
Proceedings of the IEEE International Symposium on Circuits and Systems
, pp. 788-791
-
-
Tawfik, S.A.1
Kursun, V.2
-
11
-
-
0035525694
-
Work function engineering of molybdenum gate electrodes by nitrogen implantation
-
November
-
P. Ranade et al., "Work Function Engineering of Molybdenum Gate Electrodes by Nitrogen Implantation," Electrochemical and Solid-State Letters, Vol.4, Issue 11, pp. G85-G87, November 2001.
-
(2001)
Electrochemical and Solid-State Letters
, vol.4
, Issue.11
-
-
Ranade, P.1
-
12
-
-
0036923594
-
Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
-
December
-
J. Kedzierski et al., "Metal-gate FinFET and Fully-Depleted SOI Devices Using Total Gate Silicidation," Proceedings of the IEEE Electron Devices Meeting, pp. 247-250, December 2002.
-
(2002)
Proceedings of the IEEE Electron Devices Meeting
, pp. 247-250
-
-
Kedzierski, J.1
|