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Volumn 32, Issue 2, 2009, Pages 448-452

A low-temperature SU-8 based wafer-level hermetic packaging for MEMS devices

Author keywords

Bonding; Bridges; Fabrication; Materials; Metals; Microelectromechanical devices; Micromachining; Packaging; Resists; Wafer scale integration

Indexed keywords

HERMETIC PACKAGING; LOW COSTS; LOW TEMPERATURES; MEMSDEVICES; MICROELECTROMECHANICAL SYSTEMS; NON-HERMETIC; PACKAGING METHODS; PROCESS FLOWS; RESISTS; SURFACE LAYERS; WAFER-LEVEL HERMETIC PACKAGING; WAFER-SCALE INTEGRATION;

EID: 67349085715     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2008.2006757     Document Type: Article
Times cited : (23)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.