Verification of chip multiprocessor memory systems using a relaxed scoreboard

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue 2008 PROCEEDINGS, 2008, Pages 294-305

  Shacham, Ofer ^a   Wachs, Megan ^a   Solomatnikov, Alex ^a   Firoozshahian, Amin ^a   Richardson, Stephen ^a   Horowitz, Mark ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP MULTIPROCESSOR; CONSISTENCY MODEL; DESIGN EFFORT; HIGH-LEVEL MODELS; MEMORY LOCATIONS; MEMORY MODELS; MEMORY SYSTEMS; SIMULATION-BASED VALIDATION; SPECIFIC DESIGN;

FORMAL METHODS; MULTIPROCESSING SYSTEMS; SIMULATORS; SOIL STRUCTURE INTERACTIONS; SYSTEMS ANALYSIS;

MODEL CHECKING;

EID: 66749150423     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2008.4771799     Document Type: Conference Paper

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