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Volumn 2006, Issue , 2006, Pages 73-82

Dynamic verification of memory consistency in cache-coherent multithreaded computer architectures

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VERIFICATION OF MEMORY CONSISTENCY (DVMC); MEMORY CONSISTENCY MODELS; MEMORY SYSTEMS; MULTITHREADED SERVERS;

EID: 33845567239     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2006.29     Document Type: Conference Paper
Times cited : (30)

References (28)
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    • Simics: A full system simulation platform
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    • P. S. Magnusson et al. Simics: A Full System Simulation Platform. IEEE Computer, 35(2):50-58, Feb. 2002.
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    • Magnusson, P.S.1
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    • 33748870886 scopus 로고    scopus 로고
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    • Sept.
    • M. M. Martin et al. Multifacet's General Execution-driven Multiprocessor Simulator (GEMS) Toolset. Computer Architecture News, 33(4):92-99, Sept. 2005.
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    • Martin, M.M.1
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    • Verification techniques for cache coherence protocols
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    • Pong, F.1    Dubois, M.2
  • 20
    • 0034262433 scopus 로고    scopus 로고
    • Formal automatic verification of cache coherence in multiprocessors with relaxed memory models
    • Sept.
    • F. Pong and M. Dubois. Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models. IEEE Trans. on Parallel and Distributed Systems, 11(9):989-1006, Sept. 2000.
    • (2000) IEEE Trans. on Parallel and Distributed Systems , vol.11 , Issue.9 , pp. 989-1006
    • Pong, F.1    Dubois, M.2
  • 26
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    • SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery
    • May
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.