The complexity of verifying memory coherence and consistency

IEEE Transactions on Parallel and Distributed Systems

Volumn 16, Issue 7, 2005, Pages 663-671

  Cantin, Jason F ^a   Lipasti, Mikko H ^a   Smith, James E ^a  

^a Wisconsin Electric Machines and Power Electronics Consortium   (United States)

Author keywords

Design styles; Error checking; Fault tolerance; Hardware; Memory structures; Nonnumerical algorithms and problems; Reliability; Sequencing and scheduling; Shared memory; Testing; Theory of computation

Indexed keywords

ALGORITHMS; COMPUTATION THEORY; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; DATA STORAGE EQUIPMENT; ERROR ANALYSIS; FAULT TOLERANT COMPUTER SYSTEMS; MATHEMATICAL MODELS; RELIABILITY; TESTING;

DESIGN STYLES; ERROR CHECKING; MEMORY STRUCTURES; NONNUMERICAL ALGORITHMS AND PROBLEMS; SEQUENCING AND SCHEDULING; SHARED MEMORY;

MULTIPROCESSING SYSTEMS;

EID: 22944480517     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2005.86     Document Type: Article

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