SiC wirebond multi-chip phase-leg module packaging design and testing for harsh environment

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 2009, Pages 631-636

  Ning, Puqi ^a   Lai, Rixin ^a   Huff, Daniel ^a   Wang, Fred ^a   Ngo, Khai D T ^a  

^a Virginia Polytechnic Institute and State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HARSH ENVIRONMENT; HIGH TEMPERATURE; HIGH-TEMPERATURE POWER; JUNCTION TEMPERATURES; MATERIAL SELECTION; MODULE PACKAGING; MULTI-CHIP; POWER MODULE; SIC DEVICES; THERMOMECHANICAL RELIABILITY; WIREBOND;

POWER ELECTRONICS; SILICON CARBIDE;

CHIP SCALE PACKAGES;

EID: 65949100801     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEC.2009.4802725     Document Type: Conference Paper

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