Challenges of 29nm half-pitch NAND FLASH STI patterning with 193nm dry lithography and self-aligned double patterning

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7140, Issue , 2008, Pages

  Chiu, M C ^a   Lin, Benjamin Szu Min ^a   Tsai, M F ^a   Chang, Y S ^a   Yeh, M H ^a   Ying, T H ^a   Ngai, Chris ^b   Jin, Jaklyn ^b   Yuen, Stephen ^b   Huang, Sem ^b   Chen, Yongmei ^b   Miao, Liyan ^b   Tai, Kevin ^b   Conley, Amiad ^b   Liu, Ian ^b  

^a POWERCHIP TECHNOLOGY CORPORATION   (Taiwan)

^b APPLIED MATERIALS INC   (United States)

Author keywords

193nm dry lithography; 29nm half pitch NAND FLASH; Self aligned double patterning (SADP)

Indexed keywords

193NM DRY LITHOGRAPHY; 193NM IMMERSION LITHOGRAPHIES; 29NM HALF-PITCH NAND FLASH; 45 NM HALF PITCHES; ALIGNMENT SIGNALS; AMORPHOUS CARBONS (A-C); BENDING EFFECTS; CD UNIFORMITIES; CDS; CORE LAYERS; COST ANALYSIS; ETCH PROCESS; ETCHING SELECTIVITIES; FUNDAMENTAL LIMITS; HARD MASKS; HIGH ASPECT RATIOS; HIGH SELECTIVITIES; HIGH-NA; IMMERSION LITHOGRAPHIES; LINE-WIDTH ROUGHNESS; MOORE'S LAWS; PATTERN PROFILES; PROCESS TECHNOLOGIES; RESIST PATTERNS; SELF-ALIGNED DOUBLE PATTERNING (SADP); TIME TO MARKETS; YIELD RAMPS;

ASPECT RATIO; CHEMICAL VAPOR DEPOSITION; CONCURRENT ENGINEERING; COST ACCOUNTING; DATA STORAGE EQUIPMENT; DYNAMIC POSITIONING; ETCHING; LITHOGRAPHY; OPTICAL PROPERTIES; PERCOLATION (SOLID STATE); PHOTORESISTS; ROUGHNESS MEASUREMENT; SEMICONDUCTING SILICON; SPEECH ANALYSIS; TECHNOLOGY;

AMORPHOUS CARBON;

EID: 62449129891     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.804685     Document Type: Conference Paper

References (14)

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