Probabilistic error propagation in logic circuits using the boolean difference calculus

26th IEEE International Conference on Computer Design 2008, ICCD

Volumn , Issue , 2008, Pages 7-13

  Mohyuddin, Nasir ^a   Pakbaznia, Ehsan ^a   Pedram, Massoud ^a  

^a University of Southern California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; LOGIC CIRCUITS; SWITCHING CIRCUITS; VLSI CIRCUITS;

BOOLEAN CIRCUITS; ERROR CALCULATIONS; ERROR PROBABILITIES; ERROR PROPAGATION; ERROR PROPAGATION MODELS; GATE ERRORS; GATE INPUTS; GATE LEVELS; MULTI LEVELS; NUMBER OF GATES; PRIMARY INPUTS; PRIMARY OUTPUTS; TIME COMPLEXITY;

PROBABILITY;

EID: 62349104008     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2008.4751833     Document Type: Conference Paper

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