Metal gate thickness optimization for MuGFET performance improvement

ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference

Volumn , Issue , 2008, Pages 202-205

  Ferain, I ^a,b   Collaert, N ^a   O'Sullivan, B ^a   Conard, T ^a   Popovici, M ^a   Van Elshocht, S ^a   Swerts, J ^c   Jurczak, M ^a   De Meyer, K ^a,b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c ASM BELGIUM   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

GATE DIELECTRICS; GATES (TRANSISTOR); MESFET DEVICES; MOS DEVICES; REFRACTORY METAL COMPOUNDS; THRESHOLD VOLTAGE; TIN; TITANIUM COMPOUNDS; TITANIUM NITRIDE;

AND GATES; ELECTRICAL CHARACTERIZATIONS; ENHANCED PERFORMANCES; GATE STACKS; METAL GATES; PERFORMANCE ENHANCEMENTS; PERFORMANCE IMPROVEMENTS; PERFORMANCE LOSSES; PHYSICAL ANALYSES; TIN GATES; TIN METAL GATES;

FIELD EFFECT TRANSISTORS;

EID: 58049100427     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2008.4681733     Document Type: Conference Paper

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