-
2
-
-
33644668527
-
Future 4G front-ends enabling smooth vertical handoversaper
-
Atallah J.G., and Ismail M. Future 4G front-ends enabling smooth vertical handoversaper. IEEE Circuits Devices Mag. 22 (2006) 6-15
-
(2006)
IEEE Circuits Devices Mag.
, vol.22
, pp. 6-15
-
-
Atallah, J.G.1
Ismail, M.2
-
3
-
-
31544455834
-
Defining 4G technology from the user's perspective
-
Frattasi S., Fathi H., Fitzek F.H.P., Prasad R., and Katz M.D. Defining 4G technology from the user's perspective. IEEE Network 20 (2006) 35-41
-
(2006)
IEEE Network
, vol.20
, pp. 35-41
-
-
Frattasi, S.1
Fathi, H.2
Fitzek, F.H.P.3
Prasad, R.4
Katz, M.D.5
-
4
-
-
0348013289
-
Challenges in the migration to 4G mobile systems
-
Hui S.Y., and Yeung K.H. Challenges in the migration to 4G mobile systems. IEEE Commun. Mag. 41 (2003) 54-59
-
(2003)
IEEE Commun. Mag.
, vol.41
, pp. 54-59
-
-
Hui, S.Y.1
Yeung, K.H.2
-
5
-
-
34347219612
-
-
J. Craninckx, et al., A fully reconfigurable software-defined radio transceiver in 0.13 μm CMOS, in: Proceedings of the ISSCC, 2007, pp. 346-607.
-
J. Craninckx, et al., A fully reconfigurable software-defined radio transceiver in 0.13 μm CMOS, in: Proceedings of the ISSCC, 2007, pp. 346-607.
-
-
-
-
6
-
-
56349131538
-
-
N. Ghittori, A. Vigna, P. Malcovati, S. D'Amico, A. Baschirotto, Analog baseband channel for reconfigurable multistandard (GSM/UMTS/WLAN/Bluetooth) receivers, in: Proceedings of the WIRTEP, 2006, pp. 88-92.
-
N. Ghittori, A. Vigna, P. Malcovati, S. D'Amico, A. Baschirotto, Analog baseband channel for reconfigurable multistandard (GSM/UMTS/WLAN/Bluetooth) receivers, in: Proceedings of the WIRTEP, 2006, pp. 88-92.
-
-
-
-
7
-
-
15844425476
-
Toward multistandard mobile terminals-fully integrated receivers requirements and architectures
-
Brandolini M., Rossi P., Manstretta D., and Svelto F. Toward multistandard mobile terminals-fully integrated receivers requirements and architectures. IEEE Trans. Microwave. Theory Tech. 53 (2005) 1026-1038
-
(2005)
IEEE Trans. Microwave. Theory Tech.
, vol.53
, pp. 1026-1038
-
-
Brandolini, M.1
Rossi, P.2
Manstretta, D.3
Svelto, F.4
-
8
-
-
0029508874
-
Direct-conversion radio transceivers for digital communication
-
Abidi A.A. Direct-conversion radio transceivers for digital communication. IEEE J. Solid-State Circuits 30 (1995) 1399-1410
-
(1995)
IEEE J. Solid-State Circuits
, vol.30
, pp. 1399-1410
-
-
Abidi, A.A.1
-
9
-
-
0035693617
-
A 13.5 mW 185-Msample/s ΔΣ modulator for UMTS/GSM dual-standard IF reception
-
Burger T., et al. A 13.5 mW 185-Msample/s ΔΣ modulator for UMTS/GSM dual-standard IF reception. IEEE J. Solid-State Circuits 36 (2001) 1868-1878
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, pp. 1868-1878
-
-
Burger, T.1
-
10
-
-
0036230280
-
-
G. Gomez, et al., A 1.5 V 2.4/2.9 mW 79/50 dB DR SD modulator for GSM/WCDMA in 0.13 μm digital process, in: Proceedings of the ISSCC, 2002, pp. 242-490.
-
G. Gomez, et al., A 1.5 V 2.4/2.9 mW 79/50 dB DR SD modulator for GSM/WCDMA in 0.13 μm digital process, in: Proceedings of the ISSCC, 2002, pp. 242-490.
-
-
-
-
11
-
-
0037969393
-
-
A. Dezzani, E. Andre, A 1.2 V dual-mode WCDMA/GPRS. ΣΔ modulator, in: Proceedings of the ISSCC, 2003, pp. 58-59.
-
A. Dezzani, E. Andre, A 1.2 V dual-mode WCDMA/GPRS. ΣΔ modulator, in: Proceedings of the ISSCC, 2003, pp. 58-59.
-
-
-
-
12
-
-
0038306660
-
-
R.H.M. van Veldhoven, A tri-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM/EDGE/CDMA2000/UMTS receiver, in: Proceedings of the ISSCC, 2003, pp. 60-61.
-
R.H.M. van Veldhoven, A tri-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM/EDGE/CDMA2000/UMTS receiver, in: Proceedings of the ISSCC, 2003, pp. 60-61.
-
-
-
-
13
-
-
0037345959
-
A multibit sigma-delta ADC for multimode receivers
-
Miller M.R., et al. A multibit sigma-delta ADC for multimode receivers. IEEE J. Solid-State Circuits 38 (2003) 475-482
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, pp. 475-482
-
-
Miller, M.R.1
-
14
-
-
17644427398
-
-
B. Xia, A. Valdes-Garcia, E. Sánchez-Sinencio, A configurable time-interleaved pipeline ADC for multi-standard wireless receivers, in: Proceedings of the ESSCIRC, 2004, pp. 259-262.
-
B. Xia, A. Valdes-Garcia, E. Sánchez-Sinencio, A configurable time-interleaved pipeline ADC for multi-standard wireless receivers, in: Proceedings of the ESSCIRC, 2004, pp. 259-262.
-
-
-
-
15
-
-
18744377560
-
A third-order SD modulator in 0.18 μm CMOS with calibrated mixed-mode integrators
-
Shim J.H., et al. A third-order SD modulator in 0.18 μm CMOS with calibrated mixed-mode integrators. IEEE J. Solid-State Circuits 40 (2005) 918-925
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, pp. 918-925
-
-
Shim, J.H.1
-
16
-
-
56349147610
-
-
G. Gielen, E. Goris, Reconfigurable front-end architectures and A/D converters for flexible wireless transceivers for 4G radios, in: Proceedings of the ESAT-MICAS, 2004, pp. 13-18.
-
G. Gielen, E. Goris, Reconfigurable front-end architectures and A/D converters for flexible wireless transceivers for 4G radios, in: Proceedings of the ESAT-MICAS, 2004, pp. 13-18.
-
-
-
-
17
-
-
33750504004
-
A low-power sigma-delta modulator for wireless communication receivers using adaptive biasing circuitry and cascaded comparator scheme
-
Lim J., et al. A low-power sigma-delta modulator for wireless communication receivers using adaptive biasing circuitry and cascaded comparator scheme. Analog Integrated Circuits Signal Process. (2006) 359-365
-
(2006)
Analog Integrated Circuits Signal Process.
, pp. 359-365
-
-
Lim, J.1
-
18
-
-
34548839092
-
-
T. Christen, T. Burger, Q. Huang, A 0.13 μm CMOS EDGE/UMTS/WLAN tri-mode ΔΣ ADC with -92 dB THD, in: Proceedings of the ISSCC, 2007, pp. 240-599.
-
T. Christen, T. Burger, Q. Huang, A 0.13 μm CMOS EDGE/UMTS/WLAN tri-mode ΔΣ ADC with -92 dB THD, in: Proceedings of the ISSCC, 2007, pp. 240-599.
-
-
-
-
19
-
-
34548864643
-
-
B. Putter, A Fifth-order CT/DT multi-mode ΔΣ modulator, in Proceedings. ISSCC, 2007, 244-245.
-
B. Putter, A Fifth-order CT/DT multi-mode ΔΣ modulator, in Proceedings. ISSCC, 2007, 244-245.
-
-
-
-
20
-
-
34548827575
-
-
S. Ouzounov, et al., A 1.2 V 121-mode CT ΔΣ modulator for wireless receivers in 90 nm CMOS, in: Proceedings of the ISSCC, 2007, pp. 242-600.
-
S. Ouzounov, et al., A 1.2 V 121-mode CT ΔΣ modulator for wireless receivers in 90 nm CMOS, in: Proceedings of the ISSCC, 2007, pp. 242-600.
-
-
-
-
21
-
-
51349136768
-
-
A. Morgado, et al., An adaptive SD modulator for multi-standard hand-held wireless devices, in: Proceedings of the ASSCC, 2007, pp. 232-235.
-
A. Morgado, et al., An adaptive SD modulator for multi-standard hand-held wireless devices, in: Proceedings of the ASSCC, 2007, pp. 232-235.
-
-
-
-
22
-
-
56349118676
-
-
A. Xotta, A. Gerosa, A. Neviani, A programmable-order sigma-delta converter for a multi-standard wireless receiver, in: Proceedings of the WoWCAS, 2004, pp. 33-34.
-
A. Xotta, A. Gerosa, A. Neviani, A programmable-order sigma-delta converter for a multi-standard wireless receiver, in: Proceedings of the WoWCAS, 2004, pp. 33-34.
-
-
-
-
23
-
-
14844326669
-
-
B.J. Farahani, M. Ismail, A low power multi-standard sigma delta ADC for WCDMA/GSM/Bluetooth applications, in: Proceedings of the NEWCAS, 2004, pp. 241-243.
-
B.J. Farahani, M. Ismail, A low power multi-standard sigma delta ADC for WCDMA/GSM/Bluetooth applications, in: Proceedings of the NEWCAS, 2004, pp. 241-243.
-
-
-
-
24
-
-
56349154268
-
-
A. Rusu, B.R. Jose, M. Ismail, H. Tenhunen, A dual-band sigma-delta modulator for GSM/WCDMA receivers, in: Proceedings of the DCIS, 2004, pp. 673-676.
-
A. Rusu, B.R. Jose, M. Ismail, H. Tenhunen, A dual-band sigma-delta modulator for GSM/WCDMA receivers, in: Proceedings of the DCIS, 2004, pp. 673-676.
-
-
-
-
27
-
-
33750398778
-
An A/D converter for multimode wireless receivers, based on the cascade of a doublesampling ΣΔ modulator and a flash converter
-
Gerosa A., Xotta A., Bevilacqua A., and Neviani A. An A/D converter for multimode wireless receivers, based on the cascade of a doublesampling ΣΔ modulator and a flash converter. IEEE Trans. Circuits Syst. I 53 10 (2006)
-
(2006)
IEEE Trans. Circuits Syst. I
, vol.53
, Issue.10
-
-
Gerosa, A.1
Xotta, A.2
Bevilacqua, A.3
Neviani, A.4
-
29
-
-
33845630644
-
A 20 mW 640 MHz CMOS continuous-time sigma-delta ADC with 20 MHz signal bandwidth, 80 dB dynamic range and 12-bit ENOB
-
Mitteregger G., et al. A 20 mW 640 MHz CMOS continuous-time sigma-delta ADC with 20 MHz signal bandwidth, 80 dB dynamic range and 12-bit ENOB. IEEE J. Solid-State Circuits 41 (2006) 2641-2649
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, pp. 2641-2649
-
-
Mitteregger, G.1
-
31
-
-
0034225770
-
Adaptive digital correction of analog errors in MASH ADC's-Part II: correction using test-signal injection
-
Kiss P., Silva J., Wiesbauer A., Sun T., Moon U., Stonick J., and Temes G.C. Adaptive digital correction of analog errors in MASH ADC's-Part II: correction using test-signal injection. IEEE Trans. Circuits Syst. II 47 (2000) 629-638
-
(2000)
IEEE Trans. Circuits Syst. II
, vol.47
, pp. 629-638
-
-
Kiss, P.1
Silva, J.2
Wiesbauer, A.3
Sun, T.4
Moon, U.5
Stonick, J.6
Temes, G.C.7
-
32
-
-
0029532111
-
Linearity enhancement of multibit ΣΔ A/D and D/A converters using data weighted averaging
-
Baird R.T., and Fiez T.S. Linearity enhancement of multibit ΣΔ A/D and D/A converters using data weighted averaging. IEEE Trans. Circuits Syst. II 42 (1995) 753-762
-
(1995)
IEEE Trans. Circuits Syst. II
, vol.42
, pp. 753-762
-
-
Baird, R.T.1
Fiez, T.S.2
-
34
-
-
0025642249
-
-
T. Leslie, B. Singh, An improved sigma-delta modulator architecture, in: Proceedings of the ISCAS, 1990, pp. 372-375.
-
T. Leslie, B. Singh, An improved sigma-delta modulator architecture, in: Proceedings of the ISCAS, 1990, pp. 372-375.
-
-
-
-
35
-
-
84893789916
-
-
M. Ortmanns, F. Gerfers, Y. Manoli, A continuous-time sigma-delta modulator with reduced jitter sensitivity, in: Proceedings of the ESSCIRC, 2002, pp. 287-290.
-
M. Ortmanns, F. Gerfers, Y. Manoli, A continuous-time sigma-delta modulator with reduced jitter sensitivity, in: Proceedings of the ESSCIRC, 2002, pp. 287-290.
-
-
-
-
36
-
-
0032662666
-
Excess loop delay in continuous-time delta-sigma modulators
-
Cherry J.A., and Snelgrove W.M. Excess loop delay in continuous-time delta-sigma modulators. IEEE J. Solid-State Circuits (1999) 376-389
-
(1999)
IEEE J. Solid-State Circuits
, pp. 376-389
-
-
Cherry, J.A.1
Snelgrove, W.M.2
-
38
-
-
56349132034
-
-
S. Brigati, F. Francesconi, P. Malcovati, D. Tonietto, A. Baschirotto, F. Maloberti, Modeling sigma-delta modulator non-idealities in simulink, in: Proceedings of the ISCAS, 1999, pp. 384-387.
-
S. Brigati, F. Francesconi, P. Malcovati, D. Tonietto, A. Baschirotto, F. Maloberti, Modeling sigma-delta modulator non-idealities in simulink, in: Proceedings of the ISCAS, 1999, pp. 384-387.
-
-
-
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