A triple-mode sigma-delta modulator for multi-standard wireless radio receivers

Analog Integrated Circuits and Signal Processing

Volumn 47, Issue 2, 2006, Pages 113-124

  Rusu, Ana ^a,b   Borodenkov, Alexei ^a,d   Ismail, Mohammed ^a,c,e,f   Tenhunen, Hannu ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

^b TECHNICAL UNIVERSITY OF CLUJ NAPOCA   (Romania)

^c OHIO STATE UNIVERSITY   (United States)

^d SAMSUNG Electronics   (South Korea)

^e Ohio State University   (United States)

^f IEEE   (Sweden)

Author keywords

Analog to digital conversion; Feedforward path; Multi standard; Sigma delta modulator; Triple mode; Wireless radio receiver

Indexed keywords

FEEDFORWARD PATH; MULTI-STANDARD; SIGMA-DELTA MODULATORS; TRIPLE-MODE; WIRELESS RADIO RECEIVERS;

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CMOS INTEGRATED CIRCUITS; CODE DIVISION MULTIPLE ACCESS; DELTA SIGMA MODULATION; FEEDFORWARD NEURAL NETWORKS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; LOCAL AREA NETWORKS; RADIO;

MODULATORS;

EID: 33646590599     PISSN: 09251030     EISSN: 15731979     Source Type: Journal    
DOI: 10.1007/s10470-006-3298-6     Document Type: Article

References (16)

1. R. Horn and P. Demian, Cellular and WLAN Convergence, Wireless Broadband Forum, Cambridge, UK, 2002.
2. Xiaopeng Li and Mohammed Ismail, Multi-standard CMOS Wireless Receivers: Analysis and Design, Kluwer Academic Publisher, 2002.
3. B. Brannon, "Wideband radios need wide dynamic range converters." Analog Devices - Analog Dialogue, vol. 29, pp. 11-12, 1995.
4. T. Burger and Qiuting Hueng, "A 13.5 mW, 185 MSample/s ΣΔ modulator for UMTS/GSM dual-standard IF reception." In IEEE ISSCC Conf. Digest of Tech. Papers, San Francisco, CA, 2002, pp. 44-45.
5. G. Gomez and B. Haroun, "A 1.5 V 2.4/2.9 mW 79/50 dB DR sigma-delta modulator for GSM/WCDMA in a 0.13 um digital process." In IEEE ISSCC Conference Digest of Technical Papers, San Francisco, CA, 2002, pp. 242-244.
6. M.R. Miller and C.S. Perie, "A multi-bit sigma-delta ADC for multi-mode receivers." IEEE Journal of Solid-State Circuits, vol. 38, no. 3, 2003, pp. 475-482.
7. A. Dezzani and E. Andre, "A dual-mode WCDMA/GPRS sigma-delta modulator." In IEEE ISSCC Conference Digest of Technical Papers, San Francisco, 2003, pp. 58-59.
8. R. Schreier, "ADCs and DACs: Marching towards the antenna." In IEEE ISCSS 2003, Tutorial, San Francisco, CA, 2003.
9. F. Medeiro, A. Perez-Verdu, and A. Rodriquez-Vasquez, Top-Down Design of High-Performance Sigma-Delta Modulators, Kluwer Academic Publisher, 1999.
10. A. Rusu, A. Borodenkov, M. Ismail, and H. Tenhunen, "Design of a power/performance efficient single-loop ΣΔ modulator for wireless receivers." In Proceedings of 14th International Workshop PATMOS 2004, Lecture Notes in Computer Science LNCS 3254, Santorini, 2004, pp. 564-573.
11. A.A. Hamoui and K. Martin, "High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΣΔ ADCs for broad-band applications." IEEE Trans. Circuits Syst. I: Regular Papers, vol. 51, no. 1, pp. 72-85, 2004.
12. S.R. Norsworthy, R. Schreier, and G.C. Temes. Delta-Sigma Converters-Theory, Design and Simulation, IEEE Press, New York, 1997.
13. J.G. Kenney and L.R. Carley, "CLANS: A high-level synthesis tool for high resolution data converters." In IEEE ICCAD-S8. Digest of Technical Papers, 1988, pp. 496-499.
14. R.T. Baird and T.S. Fiez, "Stability analysis of high-order Δ-Σ modulation for ADC's," IEEE-Transactions on Circuits and Systems-II, vol. 41, pp. 59-62, 1994.
15. P. Malcovati et al., "Behavioral modeling of switched-capacitor sigma-delta modulators." IEEE Trans. Circuits Syst. II, vol. 50, no. 3, pp. 352-364, 2003.
16. F. Medeiro, P. Perez-Verdu, A. Rodriguez-Vazquez, and J.L. Huertas, "Modeling OpAmp-induced harmonic distortion for SC sigma-delta modulator design." IEEE ISCAS, vol. 5, pp. 445-448, 1994.