A 80-gbit/s D-type flip-flop circuit using InP HEMT technology

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 10, 2004, Pages 1706-1711

  Suzuki, Toshihide ^a   Takahashi, Tsuyoshi ^a   Hirose, Tatsuya ^a   Takikawa, Masahiko ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

80 Gbit s measuring system; D type flip flop (D FF); InP HEMT; Rat race; Single ended to differential converter

Indexed keywords

ELECTRIC POWER SYSTEMS; ELECTRIC POWER UTILIZATION; FLIP FLOP CIRCUITS; INTEGRATED CIRCUITS; MIM DEVICES; MULTIPLEXING; NATURAL FREQUENCIES; PERMITTIVITY; TRANSCONDUCTANCE;

D-TYPE FLIP-FLOP (D-FF); FREQUENCY DETECTORS; RAT-RACE; SINGLE-ENDED TO DIFFERENTIAL CONVERTERS;

HIGH ELECTRON MOBILITY TRANSISTORS;

EID: 5444260739     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.833554     Document Type: Conference Paper

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