Void-free room-temperature silicon wafer direct bonding using sequential plasma activation

Japanese Journal of Applied Physics

Volumn 47, Issue 4 PART 2, 2008, Pages 2526-2530

  Wang, Chenxi ^a   Higurashi, Eiji ^b   Suga, Tadatomo ^a  

^a UNIVERSITY OF TOKYO   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

Bonding interface; Room temperature; Sequential plasma activated bonding; Transmittance; Void free

Indexed keywords

ANNEALING; BONDING; CHIP SCALE PACKAGES; ELECTROMECHANICAL DEVICES; ELECTRONIC EQUIPMENT MANUFACTURE; ELECTRONICS PACKAGING; MEMS; MICROELECTROMECHANICAL DEVICES; PLASMAS; REACTIVE ION ETCHING; SEMICONDUCTING SILICON COMPOUNDS; SILICON; SILICON WAFERS;

BONDING INTERFACE; ROOM TEMPERATURE; SEQUENTIAL PLASMA ACTIVATED BONDING; TRANSMITTANCE; VOID-FREE;

WAFER BONDING;

EID: 54249146105     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.47.2526     Document Type: Article

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